A high-speed median circuit

A nine-input 1.25 mW, 34 ns CMOS analog median filter for image processing in real time

“…1, has several advantages in comparison to other median filters presented in the literature [2,4,5,11,13]. First of all, the proposed median filter is devoid of negative feedback loops, which guarantees the stability, and an aperiodic time response.…”

“…The worst case of the total propagation delay can be calculated using (9), (10a), (11), and (8). Assuming that:…”

“…The references [2] and [5] present the filters which perform the bubble sort algorithm using current mirrors and current comparators. Another technique is used in [11] and [13], where three-input filters are designed using differential amplifiers, and a feedback. An interesting solution is presented in [14], where the authors propose a high precision four-input rank order filter based on gain-boosting amplifiers and voltage followers.…”

“…For this reason, the median filtering greatly facilitates further image processing such as the edge detection or the segmentation. In integrated circuits, the median filters are implemented using both analog [2][3][4][5][6][7][8][9][10][11][12][13][14][15][16] and digital [17][18][19][20] techniques, depending on the design requirements. Typically, the greatest reduction of consumed power and required chip area are achievable using analog median filters, because they do not require analog to digital converters (ADC) for conversion of video signals generated by photo sensors.…”

CMOS Nonlinear Signal Processing Circuits

“…In 1997, for the same authors, an improved version with high speed operation was proposed. The median circuit has transient recovery less than 200 ns by using 2-um CMOS process (Opris & Kovacs, 1997). In 1999, a current-input analog median filter composed of absolute value and minimum circuits was proposed (Vlassis & Siskos, 1999).…”