2013 European Conference on Circuit Theory and Design (ECCTD) 2013
DOI: 10.1109/ecctd.2013.6662237
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A high-speed QR decomposition processor for carrier-aggregated LTE-A downlink systems

Abstract: Abstract-This paper presents a high-speed QR decomposition (QRD) processor targeting the carrier-aggregated 4 × 4 Long Term Evolution-Advanced (LTE-A) receiver. The processor provides robustness in spatially correlated channels with reduced complexity by using modifications to the Householder transform, such as decomposing-target redefinition and matrix real-valued decomposition. In terms of hardware design, we extensively explore flexibilities in systolic architectures using a high-level synthesis tool to ach… Show more

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Cited by 5 publications
(8 citation statements)
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“…To ease the discussion we divide the table into two sections (columns), i.e., application-specific integrated circuit (ASIC) and ASIP, and cover 3 broad features (rows). Note that the 8 8 real-valued matrix supported by [11] and [3] in Table VII is an equivalent real domain transformation of the 4 4 complex-valued matrix. Therefore, it is fair to compare system performance with these works.…”
Section: B Post-layout Simulation Resultsmentioning
confidence: 98%
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“…To ease the discussion we divide the table into two sections (columns), i.e., application-specific integrated circuit (ASIC) and ASIP, and cover 3 broad features (rows). Note that the 8 8 real-valued matrix supported by [11] and [3] in Table VII is an equivalent real domain transformation of the 4 4 complex-valued matrix. Therefore, it is fair to compare system performance with these works.…”
Section: B Post-layout Simulation Resultsmentioning
confidence: 98%
“…For ASIC implementations, such as in [11] and [20], wordlength optimizations are performed to trade-off between hardware cost and performance. Their results show that QR pre-processing for LTE systems can be performed accurately using around 16 bits.…”
Section: Results Discussionmentioning
confidence: 99%
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“…The majority of existing QRD/SQRD algorithms are based on four basic methods: the Householder transformation (HT) method, Givens rotation (GR) method, Gram-Schmidt (GS) method, and Cholesky method. HT method [12], [13] has a good adaptability even for decomposing correlated matrices, but relatively high complexity makes HT method unfavorable for hardware implementation. GS method [14], [15] is notable for its low latency because it decomposes matrices at columnwise.…”
Section: Introductionmentioning
confidence: 99%