2015
DOI: 10.1109/tcsi.2015.2402936
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Energy Efficient Group-Sort QRD Processor With On-Line Update for MIMO Channel Pre-Processing

Abstract: This paper presents a Sorted QR-Decomposition (SQRD) processor for 3GPP LTE-A system. It achieves energy-efficiency by co-optimizing techniques, such as heterogeneous processing, reconfigurable architecture, and dual-supply voltage operation. At algorithm level, a low-complexity hybrid decomposition scheme is adopted, which switches, depending on the energy distribution of spatial channels, between the traditional brute-force SQRD and a proposed group-sort QR-update strategy. A reconfigurable vector processor … Show more

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Cited by 19 publications
(9 citation statements)
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“…8, the number of fractional bits is set to 13, while the total WL changes from The QRD architectures in [5,7,8,9] are based on GR algorithm, and [6,10] are based on Hybrid algorithm. Lin JS [5] proposed a two-phase QRD architecture, which incorporated a single exchange of the column and arrow into the general QRD procedure to achieve a better NR performance of 138.5 M. Zhang C [6] designed a hardware architecture based on hybrid GR algorithm to increase the parallelism, which achieves a good NR performance of 138 M and relatively low NPL of 87 ns. As demonstrated in Table I, one common architecture of GR is its high NR performance deriving from its high working frequency.…”
Section: Implementation Results and Comparisonmentioning
confidence: 99%
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“…8, the number of fractional bits is set to 13, while the total WL changes from The QRD architectures in [5,7,8,9] are based on GR algorithm, and [6,10] are based on Hybrid algorithm. Lin JS [5] proposed a two-phase QRD architecture, which incorporated a single exchange of the column and arrow into the general QRD procedure to achieve a better NR performance of 138.5 M. Zhang C [6] designed a hardware architecture based on hybrid GR algorithm to increase the parallelism, which achieves a good NR performance of 138 M and relatively low NPL of 87 ns. As demonstrated in Table I, one common architecture of GR is its high NR performance deriving from its high working frequency.…”
Section: Implementation Results and Comparisonmentioning
confidence: 99%
“…(4) (5), RSR can be expressed as (6), where a 2 , a 1 and a 0 depend on the expansion point x 0 and x 0 2 ð0:5; 2. Thus the value set of a 2 , a 1 , a 0 corresponding to various expansion points of x 0 in interval ð0:5; 2 can be stored in a look-up table (LUT), and the specific value of a 2 , a 1 , a 0 in (6) is chosen from LUT according the expansion point of x 0 nearest to x.…”
Section: Classical Mgs Algorithmmentioning
confidence: 99%
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“…To evaluate the proposed scheme, we mapped the algorithms on a vector-oriented reconfigurable platform [4]. As previously discussed, the platform is implemented in 65 nm ST microelectronics CMOS technology and measured with a library set of different supply voltages in Common P ower F ormat (CPF) low power design flow.…”
Section: Hardware Implementation With Dvfsmentioning
confidence: 99%
“…QR decomposition (QRD) [1] is essential for various MIMO detection algorithms, like sphere decoder [2]. To tackle the high computing cost of QRD, several algorithms [3], [4] have been proposed. These low complexity implementations rely on approximations of QRD by leveraging wireless channel feature.…”
Section: Introductionmentioning
confidence: 99%