A linear-high range output power control technique for cascode power amplifiers

Design Architectures of the CMOS Power Amplifier for 2.4 GHz ISM Band Applications: An Overview

“…In the PA design in CMOS technology, two main issues must be addressed: Oxide breakdown and the hot carrier effect [16]. The gate-oxide breakdown is caused by a high voltage drop across the gate oxide, which results in an irreversible shortage of gate-to-channel capacitance.…”

“…An increase in the driver output power reduced the Ron, thereby increasing its PAE and gain. Bameri et al (2011) proposed another general cascode class-E PA that utilized an advanced linear power control technique, as shown in Figure 6 [16]. The gate voltage of the transistor M4 was used to control the voltage of the output power.…”

“…The highest PAE of 57% was achieved in Reference [16], which implemented a general cascade architecture. The reason is that dissipation of the charge and discharge of parasitic capacitance was reduced.…”

“…Among the classes of PA architectures, the class-E PA was generally selected as the most. For the general cascode architecture, References [16,34,35] were designed with a class-E PA. In self-biased cascade cases, Reference [33] applied class-E biasing, whereas Referencs [41,42] adopted a differential cascode topology.…”

“…An RF transmitter is composed of functional blocks, such as a digital-to-analog converter (DAC), an up-conversion mixer, an oscillator, a PA, and a band pass filter (BPF), [11][12][13], as shown in Figure 1. Among all of these modules, the PA is the most vital block because its performance significantly affects the overall performance of the transmitter [14][15][16]. The PA can be defined as an electronic amplifier that converts a low-power RF signal into a high-power RF signal [1].…”