A Low Loss and Area Efficient RC Passive Poly Phase Filter for Monolithic GHz Vector-Sum Circuits

Momeni, Mahdi; Moezzi, Mohsen

doi:10.1109/tcsii.2018.2881795

Cited by 15 publications

(7 citation statements)

References 7 publications

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“…However, this solution significantly increases the occupied area because it requires additional inductance on chip. Another solution, described in [13] and [14], is an implementation of poly phase filter to generate quadrature signal. This implementation suffers from variation of resistance and capacitance values in Process Corners and temperature.…”

Section: Quadrature Signal Generationmentioning

confidence: 99%

Hybrid Cross Coupled Differential Pair and Colpitts Quadrature Digitally Controlled Oscillator Architecture

2021

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Growing importance of wireless communication systems forces reduction of power consumption of the designed integrated circuits. The paper focuses on minimization of power consumption in a digitally controlled oscillator (DCO) that can be employed as oscillator in GPS/Galileo receiver. The new hybrid architecture of DCO combines good phase noise performance of a Colpitts oscillator and relaxed startup conditions of a cross-coupled differential pair oscillator. The proposed new DCO generates a quadrature signal in a current reused frequency divider. Such solution allows of the dissipated power to be reduced. The DCO has been implemented in 110 nm CMOS technology. It generates output signal in frequency range from 1.52 GHz to 1.6 GHz and consumes 1.1 mW from 1.5 V supply voltage. The measured phase noise equals −116 dBc/Hz at 1 MHz offset from 1.575 GHz output signal.

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Section: Quadrature Signal Generationmentioning

confidence: 99%

Hybrid Cross Coupled Differential Pair and Colpitts Quadrature Digitally Controlled Oscillator Architecture

2021

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“…Reference [7] proposes an intermediate point compensation method to improve I/Q quadrature; it detects the variation and compensates the quadrature phase mismatch by feeding the network's output to the intermediate point. In [8], it shorts half of the capacitors and resistors of the first stage to reduce the loss and area. In [9], it adds two inductors at the output of the PPF circuit to reduce the loss, at the cost of increasing the occupied area.…”

Section: Introductionmentioning

confidence: 99%

Analysis and Optimization Design Scheme of CMOS Ultra-Wideband Reconfigurable Polyphase Filters on Mismatch and Voltage Loss

Wang,

Li,

Wang

et al. 2024

Electronics

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This manuscript presents an analysis and optimization scheme for the ultra-wideband passive reconfigurable polyphase filters (PPFs) to minimize I/Q (in-phase and quadrature-phase) phase/amplitude mismatch and voltage loss. By building a mathematical model of the voltage transfer, the relationship between the resonant frequency of each stage and the I/Q mismatch and the relationship between the network impedance and the voltage loss are revealed, providing a scheme for PPF optimization. The proof-of-concept 2~8 GHz wideband reconfigurable PPF is designed in a 55 nm CMOS process. The optimization scheme enables the designed PPF to achieve an I/Q phase mismatch within 0.2439° and an I/Q amplitude mismatch within 0.098 dB throughout the entire band, and it shows great robustness during Monte Carlo sampling. The maximum voltage loss is 17.7 dB, and the total chip area is 0.174 × 0.145 mm2.

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“…The poly-phase filter-based structure is a more reliable choice. However, the phase shift network in it introduces additional noise and causes power loss [4]. Quadrature LO signal can also be generated from a structure of a differential LC-VCO operating at double frequency followed by a divide-by-two current-mode-logic frequency divider (CML-FD) [5].…”

Section: Introductionmentioning

confidence: 99%

A Low-Power Quadrature LO Generator With Mutual Power-Supply Rejection Technique

Zhou¹,

Ding

Boon

et al. 2021

IEEE Access

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This paper presents a supply-insensitive low-power quadrature local oscillation (LO) generator based on the current-reused voltage-controlled oscillator (VCO) and divide-by-two frequency divider (FD). By utilizing the mutual power-supply rejection (M-PSR) technique, a voltage regulator is embedded into the FD to provide a supply-insensitive voltage for VCO. Meanwhile, the feedback loop provides a supply-insensitive current and time constant compensation for FD. The M-PSR technique does not require extra voltage headroom, thus the proposed quadrature LO generator can work under the supply of 0.9 V. A prototype of the proposed quadrature LO generator is implemented in a 28-nm CMOS process. Measurement results indicate that the LO generator achieves a phase noise of -110.5 dBc/Hz@1MHz at the carrier of 5.9 GHz and the power consumption is 1.8 mW. This work has a competitive figure of merit in supply sensitivity or in area (FOMss or FOMa respectively) among the state-of-the-art works.

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A Low Loss and Area Efficient RC Passive Poly Phase Filter for Monolithic GHz Vector-Sum Circuits

Cited by 15 publications

References 7 publications

Hybrid Cross Coupled Differential Pair and Colpitts Quadrature Digitally Controlled Oscillator Architecture

Hybrid Cross Coupled Differential Pair and Colpitts Quadrature Digitally Controlled Oscillator Architecture

Analysis and Optimization Design Scheme of CMOS Ultra-Wideband Reconfigurable Polyphase Filters on Mismatch and Voltage Loss

A Low-Power Quadrature LO Generator With Mutual Power-Supply Rejection Technique

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