A low phase noise 24/77 GHz dual-band sub-sampling PLL for automotive radar applications in 65 nm CMOS technology

Yi, Xiaoke; Boon, Chirn Chye; Sun, Junyi; Huang, Nan; Lim, Wei Meng

doi:10.1109/asscc.2013.6691071

Cited by 20 publications

(11 citation statements)

References 6 publications

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“…In a more advanced process, steeper voltage slopes will be available and the simple switch-cap SSPD will be able to sample faster, thus benefiting from the technology scaling. SSPLLs with SSPD sampling at 10s-of-GHz have been demonstrated in [9] and [10].…”

Section: Discussion and Recent Sspll Developmentmentioning

confidence: 99%

“…In that case the VCO and the loop contribute equal jitter. For a given PLL power budget P PLL , it would be best to spend it equally between the loop and VCO [1]: (9) Therefore, the design quality of the loop and VCO is equally important in improving PLL FOM. This is intuitive since the loop and the VCO have equal contribution to both power and jitter in an optimized PLL design.…”

Section: Classical Charge Pump Pllmentioning

confidence: 99%

“…The PD and CP noise is shown to be not multiplied by N 2 , and greatly attenuated by the high phase detection gain, leading to lower in-band phase noise and better PLL FOM. This article reviews the development of the sub-sampling PLL techniques and their applications in recent PLL architectures [3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21]. Section II discusses the classical charge pump PLL.…”

Section: Introductionmentioning

confidence: 99%

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Sub-sampling PLL techniques

Gao

Klumperink

Nauta

2015

2015 IEEE Custom Integrated Circuits Conference (CICC)

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In a classical PLL, the phase detector (PD) and charge pump (CP) noise is multiplied by N 2 , when referred to the VCO output, due to the divide-by-N in the feedback path. It often dominates the in-band phase noise and limits the achievable PLL jitter•power Figure-Of-Merit (FOM). A subsampling PLL uses a PD that sub-samples the high frequency VCO output with the reference clock. The PD and CP noise in this PLL is shown to be not multiplied by N 2 , and greatly attenuated by the high phase detection gain, leading to lower in-band phase noise and better PLL FOM. This article reviews the development of the PLL FOM, the sub-sampling PLL techniques and their applications in recent PLL architectures.

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Section: Discussion and Recent Sspll Developmentmentioning

confidence: 99%

Section: Classical Charge Pump Pllmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Sub-sampling PLL techniques

Gao

Klumperink

Nauta

2015

2015 IEEE Custom Integrated Circuits Conference (CICC)

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“…Therefore, a PLL with center frequency of 24 GHz and loop bandwidth of 20 kHz is adopted to ensure the flow velocity estimation from the Doppler spectrum is applicable. Compared with a typical 24 GHz VCO, normally, a 24 GHz PLL occupies about double size of chip area, and consumes about two times of power 19 . The cost is reasonably acceptable.…”

Section: Radar Architecturementioning

confidence: 99%

A 24 GHz hydrology radar system capable of wide‐range surface velocity detection for water resource management applications

Lin

Chiu

Chang³

2020

Micro & Optical Tech Letters

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We demonstrate a 24 GHz hydrology radar system. The continuous‐wave Doppler radar is capable of noncontact and wide‐range surface‐flow velocity detection in various scenarios. The radar receives the reflected echo signal through a directional narrow‐beam antenna. After amplification and demodulation by the proposed low‐noise amplifier and the subharmonic down‐conversion mixer, respectively, the Doppler frequency‐shift is analyzed by the digital signal processing (DSP) module for estimation of the water flow velocity. Moreover, for water level detection, a phase‐locked loop with micro control unit (MCU)‐controlled division ratio is included in the RF module for generating a stable and tunable (or frequency modulation) 24‐GHz‐band transmitting signal with low phase noise. To verify the radar system, outdoor field tests have been conducted. The measured results are consistent with the theoretical values, and the results of both the float method and the commercial handheld (Stalker Pro II) surface velocity radar. In the condition of water ripple lower than 3 cm, the radar functions well for flow speed range of 0.3 ~ 34.6 m/s. Overall, the hydrology radar is suitable for surface‐flow velocity detection (especially in bad weather) and water resource management (such as water‐level detection).

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“…It has been used in sub-sampling PLLs in the GHz range [13]- [15]. The second approach is used in sub-sampling PLLs where the VCO is running at tens of GHz [11], [12], [16]. Let's quantify the influence of the division factor on the in-band phase noise in the topology of Fig.…”

Section: Sub-sampling Phase Detector At Mmwavementioning

confidence: 99%

A 42 mW 200 fs-Jitter 60 GHz Sub-Sampling PLL in 40 nm CMOS

Szortyka

Shi

Raczkowski

et al. 2015

IEEE J. Solid-State Circuits

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A 60 GHz sub-sampling PLL implemented in 40 nm CMOS is presented in this paper. The sub-sampling phase detector (SSPD) runs at 30 GHz after an inductively-peaked static divideby-two. Thanks to the lower frequency of operation, the effect of non-zero sampling aperture of the switch is minimized. A dummy divider of the quadrature PLL is utilized for the sub-sampling loop to avoid extra loading in the 60 GHz path. A 53.8-63.3 GHz QVCO uses super-harmonic coupling at 120 GHz for relaxed headroom at a 0.9 V supply and achieves a free-running phase noise down to 94.5 dBc/Hz at 1 MHz offset. The millimeter-wave sub-sampling PLL achieves an RMS jitter, integrated from 1 kHz to 100 MHz, of 200 fs at a power consumption of 42 mW, compared to 210 fs for the PFD/CP PLL at 75 mW. Reference spurs in both modes are below 40 dBc. Index Terms-CMOS, frequency synthesizer, millimeter-wave, oscillators, PLL, quadrature voltage-controlled oscillator(QVCO). 0018-9200

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A low phase noise 24/77 GHz dual-band sub-sampling PLL for automotive radar applications in 65 nm CMOS technology

Cited by 20 publications

References 6 publications

Sub-sampling PLL techniques

Sub-sampling PLL techniques

A 24 GHz hydrology radar system capable of wide‐range surface velocity detection for water resource management applications

A 42 mW 200 fs-Jitter 60 GHz Sub-Sampling PLL in 40 nm CMOS

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