A Low-power Full-band 802.11abg CMOS Transceiver with Onchip PA

Abstract

A low-power full-band 802.11abg transceiver in 0.15µm CMOS technology is presented. It shows 4.4/4dB low noise figures in 2.4/5GHz receiver chains. An on-chip PA (power amplifier) delivers 20dBm output P 1dB . -40 to 140 C operation temperature is achieved by sensing technique. Onchip power detector and transmitter to receiver feedback loop estimate the I/Q imbalance, and a new I/Q compensation scheme is implemented in LO (local oscillator) rather than signal paths. It consumes 65/75mA for 2.4/5GHz receive modes and 200/107mA for 2.4/5GHz transmit modes respectively. The low power consumption, high integration and robustness make this transceiver suitable for portable applications.Index Termstransceivers, on-chip PA, I/Q calibration, temperature detect, power detect.

A CMOS transceiver with internal PA and digital pre-distortion for WLAN 802.11a/b/g/n Applications

“…Based on [2], we can compare the power saving ability from Class-A bias PA to dynamic bias ones. Generally, the peak to average power ratio of an OFDM signal is roughly 9dB, this means: (1) in which V o and V dd is the output voltage of PA and supply voltage, respectively, and R L is the optimal load for Class-A bias PA. If an optimal bias level is provided dynamically, the power consumption of the dynamic bias PA is (2) and the power consumption of Class-A bias PA is From (1), (2) and (3), the resulting relationship of power consumption between Class-A bias PA and dynamic bias ones in an OFDM system is (4) As shown in Figure 4, the PAD and PA are differential and cascode amplifiers both for G-mode and A-mode applications.…”