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A low-power full-band 802.11abg transceiver in 0.15µm CMOS technology is presented. It shows 4.4/4dB low noise figures in 2.4/5GHz receiver chains. An on-chip PA (power amplifier) delivers 20dBm output P 1dB . -40 to 140 C operation temperature is achieved by sensing technique. Onchip power detector and transmitter to receiver feedback loop estimate the I/Q imbalance, and a new I/Q compensation scheme is implemented in LO (local oscillator) rather than signal paths. It consumes 65/75mA for 2.4/5GHz receive modes and 200/107mA for 2.4/5GHz transmit modes respectively. The low power consumption, high integration and robustness make this transceiver suitable for portable applications.Index Termstransceivers, on-chip PA, I/Q calibration, temperature detect, power detect.

A 2.4GHz linear CMOS power amplifier (PA) for OFDM WLAN application in 65nm CMOS technology is presented. The cascode PA operating from 3.3V employs the proposed asymmetric lightly doped drain MOSFET (A-LDD) structure as common-gate stage to sustain large signal stress and 1.2V core device as common source stage to provide high frequency operation. Beside, dynamic bias technique is used not only to increase efficiency but also improve the linearity. In the measurement, the breakdown voltage of the A-LDD MOSFET can achieve 6.2V compared to standard I/O device of 5V. A PA EVM of -29dB is achieved at output power of 17dBm with DC current of 173mA from 3.3V supply. Also, it reveals the output P1dB of PA is 25.3dBm.