A method for the prediction of hot-carrier lifetime in floating SOI NMOSFETs

Maeda, S.; Yamaguchi, Yasuo; Kim, Il–Jung; Joachim, H.-O.; Inoue, Yasuo; Miyoshi, Hirokazu; Yasuoka, Akihiko

doi:10.1109/16.644636

Cited by 11 publications

(3 citation statements)

References 14 publications

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“…In the figures showing the device characteristic degradation vs the stress time (Figs. [6][7][8][9], degradation of device characteristics before device breakdown is very small. Thus, for a 90 nm device with a 1.6 nm thin gate oxide, we believed that gate oxide reliability apparently affects hot-carrier-induced device degradation, particularly in a narrow device.…”

Section: Resultsmentioning

confidence: 99%

“…Thus, a study on hot-carrier injection is necessary for the prediction of the long-term reliability of deep submicron SOI devices. There are a number of studies about the reliability of SOI devices, [4][5][6][7] but few studies have been reported regarding narrow devices with gate oxide thicknesses less than 3 nm. In this work, we inspect the HCE in 90 nm partially depleted SOI CMOSFETs with 1.6 nm gate oxides and various gate widths from 10 to 1.2 mm.…”

Section: Introductionmentioning

confidence: 99%

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Width Effect on Hot-Carrier-Induced Degradation for 90 nm Partially Depleted SOI CMOSFETs

Lai

Fang

Pan

et al. 2005

Jpn. J. Appl. Phys.

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The hot-carrier-induced degradation of partially depleted silicon-on-insulator complementary metal-oxide-semiconductor field-effect transistors (CMOSFETs) at various applied voltages was investigated using 90 nm body-contact silicon-on-insulator (BC-SOI) devices with 1.6 nm gate oxides and various gate widths. In this work, a small gate-width device with a large drain current density was observed to suffer from serious hot-carrier-induced degradation. By inspecting the gate current (I G) degradation, the quality of gate oxide was observed to decay apparently after hot-carrier stressing. For a 90 nm BC-SOI nMOSFET of 1.2 µm narrow gate width, the tolerance of 1.6 nm ultra thin gate oxide layer was very low particularly around the channel edge region; thus, device reliability is very critical and easily degraded because of device gate oxide breakdown after hot-carrier stressing.

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Section: Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Width Effect on Hot-Carrier-Induced Degradation for 90 nm Partially Depleted SOI CMOSFETs

Lai

Fang

Pan

et al. 2005

Jpn. J. Appl. Phys.

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show abstract

“…Maeda 等 [4] 曾针对 SOI 器件在体端浮置工作条件下的 HCI 效应寿命预测提出了新的寿命预测方法, 由于体端浮置下无法得到衬底电流 I sub−floating , 模拟验证可以用相同尺寸且体端接地的 SOI 器件的对应值 I sub−gnd /I d−gnd 代替 I sub−floating /I d−floating , 采用衬底/漏电流比率模型预测寿命, 但该预测模型没有考虑自热对寿命的影响. Rouxd 等 [5] 利用阿伦尼斯 (Arrhenius) 模型对应力下测得的寿命进行了自热修正, 建立起 Takeda 寿命预测模型, 并用线性外推法预测在正常工作电压下寿命.…”

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