2000 Solid-State, Actuators, and Microsystems Workshop Technical Digest 2000
DOI: 10.31438/trf.hh2000.4
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A Mixed-Signal Sensor Interface Microinstrument

Abstract: A single-chip implementation of a microinstrumentation system is presented. The chip incorporates voltage, current, and capacitive sensor interfaces; a temperature sensor; a lo-channel, 1%bit analog-to-digital converter; and an X-bit microcontroller with a 16-bit hardware multiplier and a 40-bit accumulator. Standard serial and parallel interfaces facilitate digital communication with a host system. Fabricated in a standard 0.35 l.trn digital CMOS process, the die occupies 3.8 mm x 4.1 mm, operates from a nomi… Show more

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Cited by 5 publications
(4 citation statements)
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“…A 2D digital calibration routine for nonlinear transducers is reported in the studies of López-Martín and Carlosena (2003) and Žorić et al (2006). A simple chip mixed signal conditioner having multi-sensory interfaces such as voltage, current, capacitive, temperature, programmable signal amplifier, and single bit Δ -Σ ADC with linearized digital output is reported for micro-instrument application (Kraver et al, 2001). Piecewise linearization scheme of thermistor by interpolation in real time is implemented by FPGA or two piecewise ADC with significantly high accuracy (0.3%) (Reverter et al, 2005;Warsito et al, 2014;Lukić and Denić, 2015;López-Lapeña et al, 2016).…”
Section: Look-up Table Methodsmentioning
confidence: 99%
“…A 2D digital calibration routine for nonlinear transducers is reported in the studies of López-Martín and Carlosena (2003) and Žorić et al (2006). A simple chip mixed signal conditioner having multi-sensory interfaces such as voltage, current, capacitive, temperature, programmable signal amplifier, and single bit Δ -Σ ADC with linearized digital output is reported for micro-instrument application (Kraver et al, 2001). Piecewise linearization scheme of thermistor by interpolation in real time is implemented by FPGA or two piecewise ADC with significantly high accuracy (0.3%) (Reverter et al, 2005;Warsito et al, 2014;Lukić and Denić, 2015;López-Lapeña et al, 2016).…”
Section: Look-up Table Methodsmentioning
confidence: 99%
“…2(b), the voltage at the CE pin is controlled with a circuit involving two opamps in the loop (i.e. A1 and A3) [12], [17], [18]. This solution allows the requirements on amplifier A1 in the SEP-2 implementation to be split over two different opamps.…”
Section: Related Workmentioning
confidence: 99%
“…But, demands for increased functionality, reduced system size, reduced electrodes size, ultra-low current detection and versatility will force potentiostats to be designed on a system-on-chip (SoC) to be implemented in advanced CMOS processes. The scaled supply voltages in these processes (Kakerow et al, 1995;Kraver et al, 2001;Reay et al, 1994), however, seriously limit the chemical analysis range.…”
Section: The Potentiostat Amplifiermentioning
confidence: 99%