A Multichannel and Compact Time to Digital Converter for Time of Flight Positron Emission Tomography

Marino, N.; Baronti, Federico; Fanucci, Luca; Saponara, Sergio; Roncella, Roberto; Bisogni, Maria Giuseppina; Guerra, A. Del

doi:10.1109/tns.2015.2403291

Cited by 22 publications

(10 citation statements)

References 47 publications

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“…Time-to-digital converters (TDCs) are vital components in numerous scientific applications, such as positron emission tomography (PET) [1][2][3][4][5][6], time-of-flight (ToF) image sensors [3][4][5][6][7], and light detection and ranging (LiDAR) [8][9][10]. Especially in ToF imaging and LiDAR applications, high-resolution TDCs affect overall performance.…”

Section: Introductionmentioning

confidence: 99%

Time Resolution Improvement Using Dual Delay Lines for Field-Programmable-Gate-Array-Based Time-to-Digital Converters with Real-Time Calibration

Chen

2018

Applied Sciences

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This paper presents a time-to-digital converter (TDC) based on a field programmable gate array (FPGA) with a tapped delay line (TDL) architecture. This converter employs dual delay lines (DDLs) to enable real-time calibrations, and the proposed DDL-TDC measures the statistical distribution of delays to permit the calibration of nonuniform delay cells in FPGA-based TDC designs. DDLs are also used to set up alternate calibrations, thus enabling environmental effects to be immediately accounted for. Experimental results revealed that relative to a conventional TDL-TDC, the proposed DDL-TDC reduced the maximum differential nonlinearity by 26% and the integral nonlinearity by 30%. A root-mean-squared value of 32 ps was measured by inputting the constant delay source into the proposed DDL-TDC. The proposed scheme also maintained excellent linearity across a range of temperatures.

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Section: Introductionmentioning

confidence: 99%

Time Resolution Improvement Using Dual Delay Lines for Field-Programmable-Gate-Array-Based Time-to-Digital Converters with Real-Time Calibration

Chen

2018

Applied Sciences

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“…10 The trend in improved TOF resolution continues with enhancements to scintillation crystals, photomultipliers, and a move to new materials such as plastics that convert the gamma photons directly to voltages and also provide improved spatial resolution. [11][12][13][14][15] As temporal and spatial resolutions within detectors increase, the ill-posed problem of reconstruction becomes less severe with positron range becoming the limiting factor.…”

Section: Estimating Attenuation From the Emission Datamentioning

confidence: 99%

“…In this installment of JNC, Presotto et al investigate the use of MLAA on 13 N-ammonia MPI using a TOF scanner. Using a phantom experiment they demonstrate convergence of the MLAA algorithm which is slower than its non-MLAA counterpart.…”

Section: Mlaa For Cardiac Petmentioning

confidence: 99%

“…In theory, MLAA can recover attenuation values only within the bounds of active contour 18 as reflected by the phantom experiment described by Presotto et al in which the phantom was wrapped in radioactive-soaked pads to emulate tracer uptake by skin. In the patient studies, Presotto et al investigated the use of 13 N-ammonia, which distributes to tissues other than the heart (e.g., lungs and liver), but only marginal uptake is present in the skeletal muscles and skin. The authors did make an adjustment to the MLAA algorithm, wherein they added false counts to avoid the boundary condition, along with a prior favoring tissue or air attenuation values at the body contour.…”

Section: Pet-mrmentioning

confidence: 99%

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Can PET be performed without an attenuation scan?

Jones

Klein

2016

Journal of Nuclear Cardiology

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“…In this type of analog‐to‐digital converters, analog input voltage is turned into a time interval, and then the time interval is converted to a digital code through TDC. Also, TDC is used in medical imaging systems such as scanners, other time of flight measurement methods, and coupled with single photon avalanche diode array to build complementary metal oxide semiconductor image sensor …”

Section: Introductionmentioning

confidence: 99%

Low‐power, latch‐based multistage time‐to‐digital converter in 65 nm CMOS technology

Razmdideh

Saneei

2018

Circuit Theory & Apps

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In this paper, a low-power and high-resolution latch-based time-to-digital converter (TDC) based on a multistage scheme is proposed. The proposed multistage TDC includes coarse, middle, and fine stages. The coarse stage is a new design of the flash TDC that is implemented by latches without using the delay cell. Also, the middle stage is a new design of the Vernier TDC with employed latches. The fine stage comprises parallel latches with different input loads.KEYWORDS high resolution, low power, TDC, VLSI | INTRODUCTIONHigh-precision time interval measurement is highly significant in many systems. Time-to-digital converter (TDC) is a system of time measurement, which converts the interval between 2 input pulses into a digital code. Time-to-digital converter has numerous applications, such as phase failure detection in the design of phase-locked loops. 1-5 The use of TDCs instead of phase comparator in phase-locked loop structure leads to removal of analog parts such as charge pump and loop filter. In addition, TDC is used in the structure of time-based analog to digital converters. 6,7 In this type of analog-to-digital converters, analog input voltage is turned into a time interval, and then the time interval is converted to a digital code through TDC. Also, TDC is used in medical imaging systems such as scanners, 8-11 other time of flight measurement methods, 12-14 and coupled with single photon avalanche diode array to build complementary metal oxide semiconductor image sensor. [15][16][17] A basic structure in design of TDC is flash TDC, which is composed of a delay line with several stages of buffers and comparators. 18 In this TDC, resolution is equal to delay of each buffer, which is the long delay. To enhance resolution, Vernier delay line structure was used. 19 The structure of this TDC is shown in Figure 1. This TDC is made up of several stages; each stage includes 2 different delay lines and a comparator. Resolution can be less than the delay of a buffer (resolution equivalent of difference in delay of 2 delay cells). In this structure, dynamic range is limited to the number of stages, and by adding extra stages, the dynamic range is increased. Because each stage is made up of 2 buffers and a comparator, power consumption of the circuit increases significantly. In addition, its linearity reduces as the number of stages increases. Two-dimensional Vernier TDC proposed in Vercesi et al 2 reduced the length of the delay lines to increase the efficiency compared with Vernier delay line TDC. However, this TDC had limited dynamic range and had serious problem in linearity. Three-dimensional Vernier space TDC 12 was introduced to increase dynamic range with minimizing the delay line. Vernier Ring TDC proposed in Yu et al 1 places the Vernier delay cells and arbiters in a ring format and reuses them for the measurement of the input time interval. This TDC achieves larger detectable range and fine time resolution, but has higher power consumption. Gated-Vernier TDC, which has 2 gated ring oscillators, acts as the...

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A Multichannel and Compact Time to Digital Converter for Time of Flight Positron Emission Tomography

Cited by 22 publications

References 47 publications

Time Resolution Improvement Using Dual Delay Lines for Field-Programmable-Gate-Array-Based Time-to-Digital Converters with Real-Time Calibration

Time Resolution Improvement Using Dual Delay Lines for Field-Programmable-Gate-Array-Based Time-to-Digital Converters with Real-Time Calibration

Can PET be performed without an attenuation scan?

Low‐power, latch‐based multistage time‐to‐digital converter in 65 nm CMOS technology

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