A Multilayer Data Copy Scheme for Low Cost Test with Controlled Scan-In Power for Multiple Scan Chain Designs

Abstract

The random-like filling strategy pursuing high compression for scan test introduces large test power. To pursue high compression in conjunction with reducing test power for multiple scan chain designs is even harder and very few works were dedicated to solve this problem. This paper proposes and demonstrates a Multilayer Data Copy (MDC) scheme for test compression as well as test power reduction for multiple scan designs. The scheme utilizes a buffer, which supports fast load using previous loaded data, to achieve test data compression and test power reduction at the same time. The scheme can be applied ATPG-independently or to be incorporated in an ATPG to generate highly compressible and power efficient test sets. Experiment results on benchmarks show that test sets generated by the scheme had large compression and power saving with little area design overhead.

Scan-Cell Reordering for Minimizing Scan-Shift Power Based on Nonspecified Test Cubes

“…Methods are proposed to utilize the don't-care bits to minimize the scanin transitions for a given test set [Mrugalski et al 2007;Li et al 2008;Lin et al 2006;Sankaralingam et al 2000;Sinanoglu et al 2003]. Sankaralingam et al [2000] proposed a don't-care-filling technique, named MT-fill, guaranteeing that the scan-in transitions generated by its filled patterns are minimum for the given test set and scan-cell ordering.…”

“…Sankaralingam et al [2000] proposed a don't-care-filling technique, named MT-fill, guaranteeing that the scan-in transitions generated by its filled patterns are minimum for the given test set and scan-cell ordering. The methods in Sankaralingam et al [2000], Mrugalski et al [2007], Lin et al [2006] reduced the test power as well as the test data volume based on built-in decompression hardware. Sinanoglu et al [2003] added Xor gates or inverters along the scan paths to minimize the scan-in transitions.…”

“…However, one serious disadvantage in the scan-chain-reordering techniques [Bonhomme et al 2002[Bonhomme et al , 2003[Bonhomme et al , 2004Dabholkar et al 1998] is that the exact test patterns and responses need to be obtained in advance. As the result, no don't-care bits can be utilized for a further reduction to scan-in transitions or test data volume, such as Sankaralingam et al [2000], Mrugalski et al [2007], Lin et al [2006], Sinanoglu et al [2003], Li et al [2008]. Sinanoglu et al [1998] can reorder the scan cells based on the test set with don't-care bits.…”