2005 IEEE Asian Solid-State Circuits Conference 2005
DOI: 10.1109/asscc.2005.251700
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A Multimode GSM/DCS/WCDMA Double Loop Frequency Synthesizer

Abstract: In this paper a WCDMA/GSM/DCS/PCS multimode frequency synthesizer is presented. It consists in a double loop synthesizer with a programmable divider between each integer synthesizer in order to provide fractional steps. The synthesizer has been implemented in a STMicroelectronics 0.25 µm RF BiCMOS technology. Measured phase noise at 400 kHz of the 3.8 Ghz carrier is -118 dBc/Hz. Power consumption is about 21 mA from a 2.5 V battery.

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Cited by 5 publications
(1 citation statement)
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“…In the perspective of aggressive system integration, a broad-band frequency synthesizer that generates the local oscillator (LO) at all the required frequencies is a key block of a multistandard transceiver [1][2][3]. However more efficient solutions can be envisioned, taking advantage of the fact that different standards call for frequency synthesizers with different specifications.…”
Section: Introductionmentioning
confidence: 99%
“…In the perspective of aggressive system integration, a broad-band frequency synthesizer that generates the local oscillator (LO) at all the required frequencies is a key block of a multistandard transceiver [1][2][3]. However more efficient solutions can be envisioned, taking advantage of the fact that different standards call for frequency synthesizers with different specifications.…”
Section: Introductionmentioning
confidence: 99%