Proceedings of the 2009 International Symposium on Physical Design 2009
DOI: 10.1145/1514932.1514940
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A new algorithm for simultaneous gate sizing and threshold voltage assignment

Abstract: Gate sizing and threshold voltage (V t ) assignment are popular techniques for circuit timing and power optimization. Existing methods, by and large, are either sensitivity-driven heuristics or based on rounding continuous optimization solutions. Sensitivity-driven heuristics are easily trapped in local optimum and the rounding is subject to remarkable errors. In this paper, we propose a systematic combinatorial approach for simultaneous gate sizing and V t assignment. The core ideas of this approach include c… Show more

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Cited by 23 publications
(9 citation statements)
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“…That is, if a block is assigned with adaptivity, our implementation selection must be performed with anticipation of performancepower changes due to the adaptivity. We make such sophisticated enhancement over a previous work of deterministic gate implementation selection [14]. Moreover, we propose a new technique to avoid redundant counting when candidate solutions are propagated in circuit traversals.…”
Section: B Adaptivity Gate Implementation Selectionmentioning
confidence: 99%
See 2 more Smart Citations
“…That is, if a block is assigned with adaptivity, our implementation selection must be performed with anticipation of performancepower changes due to the adaptivity. We make such sophisticated enhancement over a previous work of deterministic gate implementation selection [14]. Moreover, we propose a new technique to avoid redundant counting when candidate solutions are propagated in circuit traversals.…”
Section: B Adaptivity Gate Implementation Selectionmentioning
confidence: 99%
“…The problem of finding λ to maximize the optimal solution to the subproblem is the Lagrangian dual problem. Like in [14], [16], we solve the dual problem using subgradient method guided by SSTA. By doing so, the Lagrangian subproblem is allowed to use simple, less accurate timing and variability models.…”
Section: B Adaptivity Gate Implementation Selectionmentioning
confidence: 99%
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“…In [9] Chen used LR for gate sizing, solving LRS by a greedy heuristic and LDP by the subgradient method. An important contribution of this work was the application of the Karush-Kuhn-Tucker (KKT) conditions to simplify the LRS, which was also employed by a number of other works (e.g., [10], [11], [12], [13] and [14]). Tennakoon [10] proposed a technique to estimate the initial values to speedup LDP convergence.…”
Section: Introductionmentioning
confidence: 99%
“…Rahman [12] proposed a continuous sizing algorithm along with a branch-and-bound discretization procedure. Zhou [13] improved [11] by identifying some limitations on their delay modeling and used LR for timing minimization. Huang [14] focused on some convergence issues on the subgradient method to solve the LDP and proposed a projection-based method.…”
Section: Introductionmentioning
confidence: 99%