A New Figure of Merit, ${\Delta V_{\text {DIBLSS}} /(I_{\rm {d},{\mathrm{ sat}}} /I_{\rm {sd},{\mathrm{ leak}}} )}$ , to Characterize Short-Channel Performance of a Bulk-Si n-Channel FinFET Device

Self Cite

In this paper, we present a descriptive analysis of a performance index, V DIBLSS /(I on /I off), used for performance monitoring. Scaled n-and p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) (planar and FinFET devices) are included for comparison of performance trends. Also, the simplified V DIBL /(I on /I off) for monitoring the electrical characteristics of MOSFET devices is proposed due to the "quick measurements" required in the last step of the semiconductor manufacturing process. V DIBL /(I on /I off) only accounts for drain-induced barrier lowering in its numerator and on/off current ratio in its denominator. The calculation process for V DIBL /(I on /I off) is much quicker than for V DIBLSS /(I on /I off), where we need to make an extra measurement of the value of the subthreshold swing. Performance metrics, such as I on /I off and intrinsic gain, g m × r o , are reported using V DIBLSS /(I on /I off) and V DIBL /(I on /I off). V DIBLSS of about 100 mV in scaled MOSFETs is required to ensure that the gate control is strong. Since I on /I off is a sensitive function of threshold voltage, the estimates of the V DIBLSS /(I on /I off) and V DIBL /(I on /I off) are therefore dependent on the design of threshold voltage. In planar MOSFETs, small values of V DIBLSS /(I on /I off) and V DIBL /(I on /I off) are hard to achieve. However, in FinFETs, it is easy to achieve the performance requirements due to its tri-gate structure. INDEX TERMS V DIBL /(I on /I off), V DIBLSS /(I on /I off), FinFETs, intrinsic gain, performance metrics, scaled MOSFETs.

Section: Methodssupporting

confidence: 92%

“…The expression, V DIBLSS /(I on /I off ), was introduced to evaluate the performance of scaled metal-oxide-semiconductor field-effect transistors (MOSFETs) [1], [2]. Four key parameters extracted from MOSFET subthreshold characteristics are combined into a single parameter reflecting the performance.…”

Section: Introductionmentioning

confidence: 99%

Monitoring of FinFET Characteristics Using $\Delta V_{\text{DIBLSS}}/(I_{\text{on}}/I_{\text{off}})$ and $\Delta V_{\text{DIBL}}/(I_{\text{on}}/I_{\text{off}})$

Eng

Chang

et al. 2019

Self Cite

“…It is known that the SC effects cause the device-reliability reduction. Therefore, a lot of effort has been paid to reduce the SC effects [37], [38]. Since the drain resistance increase causes a degradation in device performances, the tradeoff between the SCE reduction and the device-performance reduction must be investigated.…”

Section: Device Optimizationmentioning

confidence: 99%

Leading-Edge Thin-Layer MOSFET Potential Modeling Toward Short-Channel Effect Suppression and Device Optimization

Herrera

Hirano

Iizuka

et al. 2019

A novel compact model has been developed, which considers the origin of the short-channel effect (SCE) on the basis of the potential distribution along the channel. Thus an enlargement of the insight into SCE suppression in advanced thin-layer MOSFETs is enabled. The model is extended to include the diffusion region resistance effects caused by the drain-side doping by applying the methodology of the industry-standard high-voltage MOSFET model HiSIM_HV. Usage for studying possible device optimizations revealed that clear improvements in the subthreshold characteristics due to suppression of SCEs can be achieved by slightly increasing the drain-side diffusion resistance. Disadvantageous effects on the device and circuit performances were found to be negligible.INDEX TERMS Short channel transistor, compact modeling, double-gate MOSFET, subthreshold characteristics.

“…In addition, the effects of different power supply voltages on the performance of transistors will be demonstrated. Section II covers the concept of intrinsic performance of core devices and the role of the novel figure of merit (FoM) introduced in our previous work [5]- [7].…”

Section: Introductionmentioning

confidence: 99%

Significance of Overdrive Voltage in the Analysis of Short-Channel Behaviors of n-FinFET Devices

Eng

Chang

et al. 2022

Self Cite

The short-channel behaviors of n-channel (electron-conducting) fin field-effect transistors (n-FinFETs) set at different threshold voltages were analyzed at different power supply voltages. Interesting observations were made by considering the on and off voltage states of the overdrive voltage instead of the gate-source voltage. Intrinsic transistor characteristics were revealed, enabling the comparison of short-channel characteristics between devices designed for different threshold voltages. Drain-induced barrier lowering (DIBL), subthreshold swing (SS), on/off current ratio, I on /I off , and other parameters of the devices were considered. In addition, the novel figure of merit introduced in our previous work for the evaluation of short-channel effects, which accounts for the DIBL, SS, and I on /I off of the devices, was also analyzed under this context. It was shown that the off-state current does not increase significantly with the increase in the supply voltage, indicating good gate control. INDEX TERMSV DIBLSS /(I on /I off ), V SCE , FinFETs, intrinsic voltage gain, multiple devices, overdrive voltage, performance metrics, transistor intrinsic delay.