A new local clock generator for globally asynchronous locally synchronous MPSoCs

Heck, Guilherme; Heck, Leandro S.; Moreira, Matheus T.; Moraes, Fernando; Calazans, Ney

doi:10.1007/s10470-016-0827-9

Cited by 2 publications

(1 citation statement)

References 13 publications

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“…These clock generator circuits respond to critical-path replica circuits powered by the noisy supply voltage[56][57] and they make good candidates for such local clock generators. The power consumption of such circuits are usually only a few mWs[58] and constitute only a small percentage (less than 1%) of the SoC power consumption.A recent DCO architecture proposed in[59] is designed to drive such GALS units and is capable of operating at multiple frequencies up to 1 GHz and consumes approximately 200 µW. Its area in a 65 nm technology is approximately 850 µm 2 , which is less than 0.025% of a 2 mm x 2 mm GALS unit.…”

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confidence: 99%

Modeling and Design for Low Power and Variation Tolerance in Integrated Circuits

Kamakshi¹

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Modern integrated circuits ranging from ultra-low power internet-of-things devices to high-performance processors cater to a wide spectrum of applications and notably aid in revolutionizing human lifestyle. For instance, wearable technology is a ubiquitous internetof-things application that has made great strides in the healthcare and fitness domain. High-performance chips such as graphics processing units enable an efficient computation platform for both graphics and non-graphics applications. However, along with the capability to support an ever-increasing scope of applications, these integrated circuits are also faced with a multitude of design challenges. In this work, we aim to address two such challenges: power consumption and tolerance to circuit or environmental variations, in two key markets of the semiconductor industry, namely internet-of-things and high-performance computing. Low-power operation is a crucial requirement in modern integrated circuits design. In self or battery-powered internet-of-things devices that are required to have a long lifetime, ultra-low power circuit design is of utmost importance due to limited battery capacities and efficiency of current energy harvesting technology. Ultra-low power operation increases the prospects of their sustainable or even perpetual operation. In the high-performance domain, advanced technologies and faster clock frequencies have led to an increase in static and dynamic power consumption. Low power consumption is necessary for longer battery lifetimes in portable devices like tablets and laptops. It is also crucial to reduce the thermal hot-spots and the need for heat-sinks in such processors. In this work, we investigate low power circuits and systems especially targeting the self/battery-powered applications.

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confidence: 99%