A new method for the state reduction of incompletely specified finite sequential machines

Avedillo, M.J.; Quintana, J.M.; Huertas, J.L.

doi:10.1109/edac.1990.136708

Cited by 8 publications

(4 citation statements)

References 7 publications

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“…For large size FSM's, the method requires excessive computing time. Avedillo et al [2] derived a reduced FSM by applying a sequence of transformations to internal states in a given FSM. Kannan and Sarma [20] proposed a simple heuristic algorithm to find a minimal closed cover.…”

Section: Previous Workmentioning

confidence: 99%

“…A minimal solution obtained in such a case may not be unique [ 131. This problem has been studied for many years [ 121, [ 131, [27], [3 1 I. In recent years, because of the development of automated FSM synthesis systems [ l l , [9], [lo], [28], there has been a renewed interest in this problem [2], [ 171, 1201, W I , W I . In this paper, we present a new algorithm for the state minimization problem. This algorithm constructs a search tree from prime compatibles.…”

Section: Introduction He Removal Of Redundant States Is Important Tomentioning

confidence: 99%

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An efficient algorithm to search for minimal closed covers in sequential machines

Puri

1993

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Abstract-The problem of state reduction in a finite state machine (FSM) is important to reduce the complexity of a sequential circuit. In this paper, we present an efficient algorithm for state minimization in incompletely specified state machines. This algorithm employs a tight lower bound and a fail-first heuristic, and generates a relatively small search space from the prime compatibles. It utilizes efficient pruning rules to further reduce the search space and finds a minimal closed cover. The technique guarantees the elimination of all the redundant states in a very short execution time. Experimental results with a large number of FSM's including the MCNC FSM benchmarks, are presented. The results are compared with other recent work in the area.

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Section: Previous Workmentioning

confidence: 99%

Section: Introduction He Removal Of Redundant States Is Important Tomentioning

confidence: 99%

An efficient algorithm to search for minimal closed covers in sequential machines

Puri

1993

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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“…So an interesting objective is developing state-reduction algorithms which simultaneously identify and select compatibles for the closed cover, and comparing them with existing approaches. We have developed a state-reduction algorithm, Reduces [20], using a constructive heuristic based on maximal…”

Section: Heuristic Minimisation Approaches: Previousmentioning

confidence: 99%

Efficient state reduction methods for PLA-based sequential circuits

Avedillo

Quintana

Huertas

1992

IEE Proc. E Comput. Digit. Tech. UK

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Experiences with heuristics for the state reduction of finite-state machines are presented and two new heuristic algorithms described in detail. Results on machines from the literature and from the MCNC benchmark set are shown. The area of the PLA implemention of the combinational component and the design time are used as figures of merit. The comparison of such parameters, when the state reduction step is included in the design process and when it is not, suggests that fast state-reduction heuristics should be implemented within FSM automatic synthesis systems.

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“…Yamamoto [10] presented a method for obtaining a minimum form of a given ISSM by application of a directed tree graph. Avedillo et al [11] proposed heuristic algorithm to build a closed covering for a given state table selecting maximal compatibles one by one until both covering and closure requirements are satisfied. Nearminimal solutions are thus incrementally generated.…”

Section: Introductionmentioning

confidence: 99%

Minimal Valid Automata of Sample Sequences for Discrete Event Systems

Chung

2004

Asian Journal of Control

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Minimal valid automata (MVA) refer to valid automata models that fit a given input-output sequence sample from a Mealy machine model. They are minimal in the sense that the number of states in these automata is minimal. Critical to system identification problems of discrete event systems, MVA can be considered as a special case of the minimization problem for incompletely specified sequential machine (ISSM). While the minimization of ISSM in general is an NP-complete problem, various approaches have been proposed to alleviate computational requirement by taking special structural properties of the ISSM at hand. In essence, MVA is to find the minimal realization of an ISSM where each state only has one subsequent state transition defined. This paper presents an algorithm that divides the minimization process into two phases: first to give a reduced machine for the equivalent sequential machine, and then to minimize the reduced machine into minimal realization solutions. An example with comprehensive coverage on how the associated minimal valid automata are derived is also included.

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A new method for the state reduction of incompletely specified finite sequential machines

Cited by 8 publications

References 7 publications

An efficient algorithm to search for minimal closed covers in sequential machines

An efficient algorithm to search for minimal closed covers in sequential machines

Efficient state reduction methods for PLA-based sequential circuits

Minimal Valid Automata of Sample Sequences for Discrete Event Systems

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