A New Optimized 200V Low On-Resistance Power FLYMOSFET

Weber, Yann; Morancho, Frédéric; Reynès, Jean-Michel; Stefanov, E.

doi:10.1109/ispsd.2008.4538920

Cited by 5 publications

(1 citation statement)

References 7 publications

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“…The parameters that were used for the single-EPI, double-EPIs, and triple-EPIs structure simulation. Figure 12 compares the specific on-resistance performance of our proposed SGT devices with that of the other middle-voltage devices reported in [4,15,21,[32][33][34][35][36][37][38][39][40], ideal silicon limit, and super junction (SJ) limit for cell pitch = 5 and 10 µm in the 50-200 V range. Form Figure 12, we observe that the triple-EPIs structure and those using a double split-gate device [15] and stepped oxide SGTs [18,20,21] can achieve a very low R on,sp in the middle-voltage range because they all can maintain more uniform EF distributions between two trenches.…”

Section: Devicementioning

confidence: 99%

150–200 V Split-Gate Trench Power MOSFETs with Multiple Epitaxial Layers

et al. 2020

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A rating voltage of 150 and 200 V split-gate trench (SGT) power metal-oxide- semiconductor field-effect transistor (Power MOSFET) with different epitaxial layers was proposed and studied. In order to reduce the specific on-resistance (Ron,sp) of a 150 and 200 V SGT power MOSFET, we used a multiple epitaxies (EPIs) structure to design it and compared other single-EPI and double-EPIs devices based on the same fabrication process. We found that the bottom epitaxial (EPI) layer of a double-EPIs structure can be designed to support the breakdown voltage, and the top one can be adjusted to reduce the Ron,sp. Therefore, the double-EPIs device has more flexibility to achieve a lower Ron,sp than the single-EPI one. When the required voltage is over 100 V, the on-state resistance (Ron) of double-EPIs device is no longer satisfying our expectations. A triple-EPIs structure was designed and studied, to reduce its Ron, without sacrificing the breakdown voltage. We used an Integrated System Engineering-Technology Computer-Aided Design (ISE-TCAD) simulator to investigate and study the 150 V SGT power MOSFETs with different EPI structures, by modulating the thickness and resistivity of each EPI layer. The simulated Ron,sp of a 150 V triple-EPIs device is only 62% and 18.3% of that for the double-EPIs and single-EPI structure, respectively.

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Section: Devicementioning

confidence: 99%

150–200 V Split-Gate Trench Power MOSFETs with Multiple Epitaxial Layers

et al. 2020

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AC‐SJ VDMOS with ultra‐low resistance

Wang

Duan

Zhang

et al. 2020

Micro & Nano Letters

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An accumulation superjunction (AC-SJ) vertical power metal-oxide-semiconductor field-effect transistor (VDMOS) is proposed and its mechanism is investigated. Different from the conventional VDMOS, a number of carriers are accumulated and modulate the conductivity of the drift region when the AC-SJ VDMOS works in the on-state. The causes of carrier AC and the factors affecting the amount of carrier are analysed. The influences of these factors on the output characteristics are studied by simulation. Simulation results show that the on specific resistance (R on,sp) of the AC-SJ VDMOS decreases from 6.64 mΩ cm 2 of the conventional VMOS to 1.53 mΩ cm 2 with the same drift region length of 15 μm. The AC-SJ VDMOS obtains very low R on,sp by accumulating electrons while maintains high breakdown voltage due to SJ theory, thereby breaking the SJ limit in silicon.

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Effect of floating island thickness and doping concentration in power FLIMOS: 2-D simulation study

Hong

Qiao

et al. 2009

2009 International Conference on Communications, Circuits and Systems

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A New Optimized 200V Low On-Resistance Power FLYMOSFET

Cited by 5 publications

References 7 publications

150–200 V Split-Gate Trench Power MOSFETs with Multiple Epitaxial Layers

150–200 V Split-Gate Trench Power MOSFETs with Multiple Epitaxial Layers

AC‐SJ VDMOS with ultra‐low resistance

Effect of floating island thickness and doping concentration in power FLIMOS: 2-D simulation study

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