Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)
DOI: 10.1109/cicc.2002.1012782
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A new reduced clock-swing flip-flop: NAND-type keeper flip-flop (NDKFF)

Abstract: A new reduced clock-swing flip-flop, named NAND-type Keeper Hip-Fiop(NDKFF) is proposed. Compared with other conventional reduced clock-swing flip-flops such as HSFF and RCSFF, NDKFF features simple configuration, which does not have additional clock drivers or does not have additional n-a d o r pwells. Compared with the hybrid-latch flip-flop, 52% of the flip-flop power and 64% of the clocking power are saved in the case of 0.25pm CMOS technology. Moreover CLK-to-Q delay is comparable to that of conventional … Show more

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Cited by 8 publications
(12 citation statements)
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“…L-C 2 MOS-SA [11], however, exhibits degraded behavior at the worst-case corners, as described in Section 5.3. The proposed topology exhibits the second lowest leakage power, achieving significant reduction, particularly as compared to NDKFF [13] and CRFF [14]. Overall transistor width of the proposed topology is less than the other topologies except L-C 2 MOS-SA [11].…”
Section: Comparative Analysismentioning
confidence: 80%
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“…L-C 2 MOS-SA [11], however, exhibits degraded behavior at the worst-case corners, as described in Section 5.3. The proposed topology exhibits the second lowest leakage power, achieving significant reduction, particularly as compared to NDKFF [13] and CRFF [14]. Overall transistor width of the proposed topology is less than the other topologies except L-C 2 MOS-SA [11].…”
Section: Comparative Analysismentioning
confidence: 80%
“…The proposed flip-flop topology and the previous circuits in existing work (L-C 2 MOS-SA [11], L-C 2 MOS-SA-2 [11], RCSFF [12], NDKFF [13], and CRFF [14]) are designed using a 45 nm technology with a nominal supply voltage of 1 V and all of the simulations are performed using Spectre [15]. The clock signal has a reduced swing of 0.7 V. The clock and data frequencies are, respectively, 1.5 GHz and 150 MHz.…”
Section: Simulation Setupmentioning
confidence: 99%
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“…The NAND-type Keeper F/F [5](NDKFF, Fig. 1c) doesn't require separate well and eliminates unnecessary signal transitions inside the F/F for constant input.…”
Section: Introductionmentioning
confidence: 99%
“…Low Clock-Swing F/F circuits (a: LHDFF[2],[3]; b: RCSFF[1]; c: NDKFF[5]; d: proposed CRFF). The numbers indicate the transistors widths in µm (unless otherwise explicitly stated, NMOSFETs widths=0.54µm, PMOSFETs widths=0.82µm, lengths=0.1µm).…”
mentioning
confidence: 99%