2004
DOI: 10.4218/etrij.04.0103.0104
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A New Structure of SOI LDMOSFET Structure with a Trench in the Drift Region for a PDP Scan Driver IC

Abstract: To improve the characteristics of breakdown voltage and specific on‐resistance, we propose a new structure for a LDMOSFET for a PDP scan driver IC based on silicon‐on‐insulator with a trench under the gate in the drift region. The trench reduces the electric field at the silicon surface under the gate edge in the drift region when the concentration of the drift region is high, and thereby increases the breakdown voltage and reduces the specific on‐resistance. The breakdown voltage and the specific on‐resistanc… Show more

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Cited by 5 publications
(3 citation statements)
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“…The breakdown voltage [3] between drain and source with the gate short-circuited to the source, denoted by BV DSS , is the lowest voltage that prevents an avalanche across the termination ring. An avalanche occurs at a lower value of V DS whenever the channel is turned on at V GS = 0.…”
Section: Space Applications Young Hwan Lho and Ki Yup Kimmentioning
confidence: 99%
See 1 more Smart Citation
“…The breakdown voltage [3] between drain and source with the gate short-circuited to the source, denoted by BV DSS , is the lowest voltage that prevents an avalanche across the termination ring. An avalanche occurs at a lower value of V DS whenever the channel is turned on at V GS = 0.…”
Section: Space Applications Young Hwan Lho and Ki Yup Kimmentioning
confidence: 99%
“…The charge Q tot is influenced by fixed oxide charge Q F and interfacial trap charge Q I as shown in (3).…”
Section: Radiation Effects On Power Mosfetmentioning
confidence: 99%
“…One way to improve the breakdown voltage characteristics and to move the harmful electric field further away from the gate surface edge is placing an STI divot in the LDD region. Hence, the oxide under the gate edge in an STI LDMOS is thicker than the conventional LOCOS, thus reducing the potential crowding at the body/drift surface [9,11]. Unfortunately, the reduction of the conduction area and the gate field plate effectiveness in an STI LDMOS can slightly degrade the R ON value and cannot be sufficiently effective in reducing the surface electric field peak at the body drift region, especially for low-voltage LDMOS transistors.…”
Section: Introductionmentioning
confidence: 99%