A novel conduction-convection based cooling solution for 3D stacked electronics

Kota, Krishna; Hidalgo, Pablo; Joshi, Yogendra; Glezer, Ari

doi:10.1109/stherm.2010.5444316

Cited by 8 publications

(4 citation statements)

References 20 publications

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“…Matsumoto et al [8] discussed and evaluated various possible cooling methods from the bottom and periphery of the silicon interposer. Kota et al [9] presented a parametric study focusing on the design and thermal properties of a liquid interface thermal management solution for 3D stacks using a radial heat sink cooled by an array of synthetic jet actuators. Phan and Agonafer [10,11] developed a novel cooling method for 3D ICs using a multidimensional thermoelectric cooler.…”

Section: Introductionmentioning

confidence: 99%

Effect of Through-Silicon-Via Joule Heating on Device Performance for Low-Powered Mobile Applications

Mirza

Naware

Jain

et al. 2014

Journal of Electronic Packaging

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Three-dimensional (3D) through-silicon-via (TSV) technology is emerging as a powerful technology to reduce package footprint, decrease interconnection power, higher frequencies, and provide efficient integration of heterogeneous devices. TSVs provide high speed signal propagation due to reduced interconnect lengths as compared to wire-bonding. The current flowing through the TSVs results in localized heat generation (joule heating), which could be detrimental to the device performance. The effect of joule heating on performance measured by transconductance, electron mobility (e− mobility), and channel thermal noise is presented. Results indicate that joule heating has a significant effect on the junction temperature and subsequently results in 10–15% performance hit.

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Section: Introductionmentioning

confidence: 99%

Effect of Through-Silicon-Via Joule Heating on Device Performance for Low-Powered Mobile Applications

Mirza

Naware

Jain

et al. 2014

Journal of Electronic Packaging

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show abstract

“…Other papers describe a numerical thermal analysis of hot spot dissipation [9] or uniform dissipation [10] to extract the overall thermal resistance of 3D stack chip packages. To cope with the thermal issues of 3D integration, several advanced dedicated cooling solutions have been proposed, ranging from conduction-convection based cooling solutions [11] to complex inter-tier liquid cooling solutions [12,13,14]. interconnect structures of 3D ICs, consisting of back end of line structures and through-Si vias (TSVs), influence the thermal behavior of a 3D IC and increase the complexity of the correspondent heat transfer paths.…”

Section: Introductionmentioning

confidence: 99%

Characterization of the thermal impact of Cu-Cu bonds achieved using TSVs on hot spot dissipation in 3D stacked ICs

Oprins

Cherman

Vandevelde

et al. 2011

2011 IEEE 61st Electronic Components and Technology Conference (ECTC)

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3D-IC stacking is a promising technique for miniaturization and performance enhancement of electronic systems. The complexity of the interconnect structures, combined with the reduced thermal spreading in the thinned dies used for the stacking and the poorly thermally conductive adhesives adopted for bonding the dies in the stack complicate the modeling of the thermal behavior of 3D ICs. The same amount of energy dissipation will lead to higher temperatures and a more pronounced temperature peak in a stacked die with respect to a single die. Therefore, the thermal behavior in a 3D-IC needs to be studied thoroughly. In this paper, the impact of TSVs and the Cu-Cu bonding on the temperature profile of the top and bottom die of a 3D stack is characterized by using dedicated test chips with integrated thermal heaters and temperature sensors. A specific experimental set-up is conceived and used to evaluate and improve the thermal models for the 3D stacks.

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“…As a result, the same power dissipation in a 3D stack will lead to higher temperatures and more pronounced temperature peaks in a stacked die package compared to a single die package. To address the thermal issues of 3D integration, several advanced dedicated cooling solutions are developed ranging from thermal herding by smart placement of thermal vias [4] over conduction-convection based cooling solutions [5] to complex inter-tier liquid cooling solutions [6,7,8]. The interconnection structures, back end of line structures and through-Si vias (TSVs) complicate the thermal behavior of a stacked die structure increase the complexity of the conductive heat transfer paths in a stacked die structure.…”

Section: Introductionmentioning

confidence: 99%

Steady state and transient thermal analysis of hot spots in 3D stacked ICs using dedicated test chips

Oprins

Cherman

Stucchi

et al. 2011

2011 27th Annual IEEE Semiconductor Thermal Measurement and Management Symposium

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3D stacking of dies is a promising technique to allow miniaturization and performance enhancement of electronic systems. The complexity of the interconnection structures, combined with the reduced thermal spreading in the thinned dies and the poorly thermally conductive adhesives complicate the thermal behavior of a stacked die structure. The same dissipation will lead to higher temperatures and a more pronounced temperature peak in a stacked die package compared to a single die package. Therefore, the thermal behavior in a 3D-IC needs to be studied thoroughly. In this paper, a steady state and transient analysis is presented for hot spots in 3D stacked structures. For this analysis, dedicated test chips with integrated heaters and temperature sensors are used to assess the temperature profile in the different tiers of the stack and to investigate the impact of TSVs on the temperature profile. This experimental set-up is used to evaluated and improve the thermal models for the 3D stacks.

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A novel conduction-convection based cooling solution for 3D stacked electronics

Cited by 8 publications

References 20 publications

Effect of Through-Silicon-Via Joule Heating on Device Performance for Low-Powered Mobile Applications

Effect of Through-Silicon-Via Joule Heating on Device Performance for Low-Powered Mobile Applications

Characterization of the thermal impact of Cu-Cu bonds achieved using TSVs on hot spot dissipation in 3D stacked ICs

Steady state and transient thermal analysis of hot spots in 3D stacked ICs using dedicated test chips

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