A novel current-reuse architecture demonstrated on a two-stage GaN-on-SiC LNA

Colangeli, Sergio; Ciccognani, Walter; Vittori, Marco; Palomba, Mirko; Limiti, Ernesto

doi:10.1109/apmc.2017.8251526

Cited by 3 publications

(6 citation statements)

References 11 publications

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“…A test vehicle specifically designed to demonstrate the proposed methodology was presented by the Authors in Ref. . More in particular, two versions of a same two‐stage low‐noise amplifier, only differing in DC bias scheme, were designed: the baseline version was made up of two independently operated active stages, while the second one implemented the stacked‐bias architecture in a paradigmatic form.…”

Section: Stacked Lna Designmentioning

confidence: 99%

“…As was shown in Ref. 9, this solution is applicable to general cascaded amplifiers (or similar circuits), i.e. amplifiers obtained by chaining a number of active (single-ended) stages and matching networks.…”

Section: Introductionmentioning

confidence: 96%

“…Furthermore, the presence of a medium‐power final stage offers the opportunity of commenting on an interesting adaptation of the paradigmatic scheme illustrated in Ref. to a real‐world design. With regard to the latter point, the presented design fits into the steadily expanding landscape of monolithic LNAs, front‐end blocks or SCFEs based on Gallium Nitride technology.…”

Section: Introductionmentioning

confidence: 99%

“…In this paper, a recently proposed stacked‐bias approach, specifically devised for microwave applications, is applied to the design of an actual X‐band LNA targeting radar applications. As was shown in Ref.…”

Section: Introductionmentioning

confidence: 99%

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Three‐stage GaN‐on‐SiC medium‐power LNA exploiting a current‐reuse architecture

Colangeli

Vittori

Ciccognani

et al. 2018

Int J RF Microw Comput Aided Eng

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A recently presented implementation of the current‐reuse concept, specifically devised for microwave cascaded single‐ended amplifiers, is applied to the design of a three‐stage medium‐power low‐noise amplifier (LNA) operating in X‐band. The LNA is realized on a GaN‐on‐SiC 0.25 µm technology supplied by Leonardo S.p.A.'s internal foundry and achieves a transducer gain (GT) of 24 dB, a noise figure (NF) better than 2.5 dB and an output power at 1 dB gain compression (Pout,1dB) higher than 20 dBm over the whole X‐band. The first two stages of the LNA are stacked and share the same current while requiring, as a pair, a doubled external supply voltage, which corresponds to that of the third, medium‐power stage. The versatility of the adopted current‐reuse concept is exemplified by the fact that the two low‐noise stages are initially designed in a conventional single‐ended topology: only in a second step are they converted into a current‐sharing stage pair with no significant effect on RF performance. Nonconventional approaches to low‐noise design and small‐signal stability analysis developed by the Authors and adopted in this design are referred to the Reader.

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Section: Stacked Lna Designmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 96%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Three‐stage GaN‐on‐SiC medium‐power LNA exploiting a current‐reuse architecture

Colangeli

Vittori

Ciccognani

et al. 2018

Int J RF Microw Comput Aided Eng

Self Cite

View full text Add to dashboard Cite

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“…In most practical applications, the optimum supply voltage of a transistor is usually much lower than that available at the system level [6]. In traditional cases, additional DC-DC conversion stages or resistive elements are used to drop a voltage, which has the drawbacks of more complex system architecture or more power consumption.…”

Section: Introductionmentioning

confidence: 99%

A Q-Band Current-Reused Low Noise Amplifier With Simultaneous Noise and Input Matching

Xie¹,

Wu²,

Zhou³

et al. 2021

PIER C

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In this paper, a Q-band GaAs low noise amplifier (LNA) for satellite communications is presented. The LNA is designed using common-source (CS) topology, self-biased configuration, and current-reused technology. Simultaneous noise and input matching are achieved by employing source series inductance. The current-reused LNA is fabricated in a 90 nm GaAs pseudomorphic high electron mobility transistor (pHEMT) process. On-wafer measurement results show that the LNA features a small-signal gain of 23.8 ∼ 24.5 dB, noise figure (NF) of 2 ∼ 2.1 dB, and output 1-dB compression point (OP1 dB) of 6.6 ∼ 8 dBm over 36 ∼ 42 GHz, while consuming 10.9 mA with a supply voltage of 5 V. The chip size is 1.6 × 0.8 mm 2 including all RF and dc pads.

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