2014
DOI: 10.1016/j.mejo.2014.04.014
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A novel digital logic implementation approach on nanocrossbar arrays using memristor-based multiplexers

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Cited by 42 publications
(85 citation statements)
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“…A comparative summary of the memristor-based MUX realization in [8] and the two alternate realizations proposed in this paper is shown in Table I. It can be seen that the proposed 3-memristor realization requires the smallest number of memristors but requires 8 steps to compute, which is same as [8].…”
Section: (B) Steps Of Computationmentioning
confidence: 95%
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“…A comparative summary of the memristor-based MUX realization in [8] and the two alternate realizations proposed in this paper is shown in Table I. It can be seen that the proposed 3-memristor realization requires the smallest number of memristors but requires 8 steps to compute, which is same as [8].…”
Section: (B) Steps Of Computationmentioning
confidence: 95%
“…In [8], a 2-to-1 multiplexer realization has been reported that requires six memristors as shown in Figure 4 4(c) respectively, which consists of seven implication steps and one data loading step. It may be noted that every implication step is of the form P = Q → P , that can be directly implemented using memristors.…”
Section: B Multiplexer Realization Using Memristorsmentioning
confidence: 99%
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