A novel fabrication process of surface via-holes for GaAs power FETs

Furukawa, H.; Fukui, Taichiro; Tanaka, Tsuyoshi; Noma, A.; Ueda, Daisuke

doi:10.1109/gaas.1998.722690

Cited by 10 publications

(6 citation statements)

References 9 publications

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“…To improve the high-frequency operation of silicon RFICs, it is crucial to reduce extrinsic parasitics. In particular, the source impedance of MOSFETs and the emitter impedance of BJTs degrade the gain, noise figure, and efficiency of RF amplifiers [2]- [4]. Through-wafer interconnects, or substrate vias, are widely used in GaAs microwave and millimeter-wave ICs to provide a low-impedance ground to reduce the source impedance [3], [4].…”

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confidence: 99%

“…In particular, the source impedance of MOSFETs and the emitter impedance of BJTs degrade the gain, noise figure, and efficiency of RF amplifiers [2]- [4]. Through-wafer interconnects, or substrate vias, are widely used in GaAs microwave and millimeter-wave ICs to provide a low-impedance ground to reduce the source impedance [3], [4]. Extending this idea to silicon, we have developed a through-wafer via technology for silicon, which allows for the implementation of high-aspect ratio, low-impedance ground connections.…”

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confidence: 99%

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A Through-Wafer Interconnect in Silicon for RFICs

Scholvin

Alamo

2004

IEEE Trans. Electron Devices

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Abstract-In order to minimize ground inductance in RFICs, we have developed a high-aspect ratio, through-wafer interconnect (or substrate via) in silicon that features a silicon nitride barrier liner and completely filled Cu core. We have fabricated vias with a nominal aspect ratio of 30 and verified the integrity of the insulating liner in vias with an aspect ratio of eight. The inductance of vias with nominal aspect ratios between three and 30 approach the theoretically expected values. This interconnect technology was exploited in a novel Faraday cage structure for substrate crosstalk suppression in system-on-chip applications. The isolation structure consists of a ring of grounded vias that surrounds sensitive or noisy portions of a chip. This Faraday cage structure has shown noise suppression of 30 dB at 10 GHz and 16 dB at 50 GHz at a distance of 100 m when compared to the reference structure.Index Terms-Ground inductance, Si RF technology, substrate noise, substrate via, system-on-chip (SOC), three-dimensional interconnects, through-wafer interconnect.

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confidence: 99%

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confidence: 99%

A Through-Wafer Interconnect in Silicon for RFICs

Scholvin

Alamo

2004

IEEE Trans. Electron Devices

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“…Since silicon technologies have advantages of lower manufacturing costs and high integration capabilities compared with GaAs technologies, silicon technologies have the possibility to replace GaAs technologies in MMICs [1]. One of the key components to improve the high frequency performances of silicon MMICs is a low impedance ground via hole [2]- [3]. Ground via holes are widely used in GaAs MMICs to improve the high frequency performances of singleended amplifiers [2].…”

Section: Introductionmentioning

confidence: 99%

“…One of the key components to improve the high frequency performances of silicon MMICs is a low impedance ground via hole [2]- [3]. Ground via holes are widely used in GaAs MMICs to improve the high frequency performances of singleended amplifiers [2]. Via holes, or through-wafer interconnects, for silicon technologies have also been developed [3]- [5], but most of them are used in substrate crosstalk isolations [3] and packaging [4].…”

Section: Introductionmentioning

confidence: 99%

X-Band SiGe-MMIC Low Noise Amplifier Using Low Parasitic Capacitance Via Holes for Emitter Grounding

Nakajima

Yoshida

Ueda

et al. 2007

2007 IEEE Radio and Wireless Symposium

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An X-band SiGe-MMIC single-ended twostage low noise amplifier (LNA) using low parasitic capacitance via holes for the emitter grounding is described. In order to obtain low impedance emitter/source ground of a silicon based single-ended amplifier, we have developed via holes which can be fabricated after the 0.35 ,um SiGeBiCMOS process. Since there are low resistivity epitaxial layers in the silicon substrate, the via hole has the large parasitic capacitance. By introducing deep trench isolations to separate the epitaxial layers around a via hole from the other area of the chip, the parasitic capacitance of a via hole can be reduced. A fabricated X-band single-ended two-stage LNA using the developed low parasitic capacitance via holes shows a gain of 21 dB, a noise figure of 4.8 dB, an IPldB of -26 dBm at 11 GHz. The power dissipation of the circuit is 19.1 mW at a 3.3 V supply voltage. The developed via holes can be useful for the silicon MMICs at the high frequency of X-band.

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“…&@To handle extremely fragile wafer (typically 30 -1 O O p m thick) is not suited for the high volume production for consumer market. Our new fabrication process SVH can be applied only for the front-side [12]. The SVH process consists of three process steps, namely, deep trench etching, refilling the trench with gold electroplating, and exposing refilled metal by thinning the backside.…”

Section: A Surface Via-hole (Svw Techniquementioning

confidence: 99%

Review of compound semiconductor devices for RF power applications

Ueda

Proceedings of the 14th International Symposium on Power Semiconductor Devices and Ics

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The progress of RF power devices based on compound semiconductor materials are reviewed. Two major application of those devices are the handy terminals and the base stations. The highest poweradded-efficiency is the major concern for the mobile terminals, while the latter one requires the high power transmitting capability with sufficient linearity. Compound semiconductor devices are suited for those applications. The present paper reviews the recent developments of those RF power devices.

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A novel fabrication process of surface via-holes for GaAs power FETs

Cited by 10 publications

References 9 publications

A Through-Wafer Interconnect in Silicon for RFICs

A Through-Wafer Interconnect in Silicon for RFICs

X-Band SiGe-MMIC Low Noise Amplifier Using Low Parasitic Capacitance Via Holes for Emitter Grounding

Review of compound semiconductor devices for RF power applications

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