A Novel Voltage Divider Circuit

Selvam, K.C.; Latha, S.

doi:10.48084/etasr.239

Cited by 6 publications

(4 citation statements)

References 6 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…However, the concept of memristor did not catch the attention of the scientific community until 2008. The electronic community continued to develop analog and digital circuits without considering the tremendous potential of memristors [2][3][4]. In fact, Hewlett Packard (HP) Labs manufactured the first memristor component with layers of TiO 2 between two layers of Pt in 2008 [5].…”

Section: Introductionmentioning

confidence: 99%

Memristor, Memcapacitor, Meminductor : Models and Experimental Circuit Emulators

Kebbati

Allaume

Bennani

2022

Eng. Technol. Appl. Sci. Res.

View full text Add to dashboard Cite

Before 1971, the number of passive electrical components was limited to three: resistor, capacitor, and inductor. In 1971, Pr. Chua predicted the existence of a fourth element, called memristor, since it corresponds to a resistor with memory behavior. Several years later, the concept of memory circuit was extended to capacitors and inductors. This paper proposes mathematical models for mem-elements, validated by Matlab and experimental circuit emulators for memcapacitor and meminductor. The experimental results show a good fit between theory, Ltspice simulations, and emulation circuits.

show abstract

Section: Introductionmentioning

confidence: 99%

Memristor, Memcapacitor, Meminductor : Models and Experimental Circuit Emulators

Kebbati

Allaume

Bennani

2022

Eng. Technol. Appl. Sci. Res.

View full text Add to dashboard Cite

show abstract

“…Alternatively, one may perform demodulation in the analog domain. This approach requires either two high-resolution ADCs, or an analog voltage divider (VD) [6][7] and a single high-resolution ADC. Performing the demodulation in the analog domain considerably relaxes the constraints on the sampling frequency of the ADC(s).…”

Section: Introductionmentioning

confidence: 99%

“…However, the emitter saturation current varies significantly from one transistor to another and also with temperature. An alternative method is presented in [7], where the VD is implemented by a twoquadrant multiplier using only amplifiers and resistors. A relatively high resolution can be achieved at the cost of increasing complexity and power consumption.…”

Section: Introductionmentioning

confidence: 99%

An Adaptative Ratio-Metric Analog-To-Digital Interface For Weakly-Coupled Resonant Sensors Based On Mutually Injection-Locked Oscillators

Mostafa¹,

Jerome²,

Raposo³

et al. 2019

2019 Symposium on Design, Test, Integration &Amp; Packaging of MEMS and MOEMS (DTIP)

View full text Add to dashboard Cite

In this paper, we propose a new ratio-metric interface for amplitude-modulated MEMS sensors based on mutually injection-locked oscillators (MILO). The two outputs are down-converted by a peak demodulator to improve the immunity to phase variation and noise. The peak values are then fed into a second-order discrete-time delta-sigma modulator that directly produces a digital ratio-metric output with a worstcase resolution greater than 16 bits and with input full scale of 0.6. The interface is clocked by the resonators output signal and is adapted for a sampling frequency up to 1MHz.

show abstract

“…There are several ways for analogue division: (i) an antilogue network configuration; (ii) dividers using a field effect transistor (FET) [5]; the fact that an FET can be used as a voltage‐dependent resistor, albeit within restricted gate‐to‐source voltage limits, is exploited in this method; (iii) a different method converts the input voltages to equivalent frequencies; takes the ratio of two frequencies by using conventional digital techniques, and then produces an output voltage proportional to the period of this ratio‐metric signal [6]; (iv) dividers consist of four MOSFETs biased in weak inversion [7]; (v) employing a multiplier in a feedback loop of an opamp [8].…”

Section: Introductionmentioning

confidence: 99%

Double dual slope multiplier‐cum‐divider

Selvam¹

2013

Electron. lett.

View full text Add to dashboard Cite

A novel type of analogue multiplier-cum-divider is described. A square waveform of period T which is proportional to V 2 /V 1 , where V 2 and V 1 are the two input applied voltages, is generated. Another input voltage V 3 is integrated during the period T. The peak value of the integrated output is V 2 V 3 /V 1 .Introduction: There are several multiplier circuits: (i) the sigma-delta or time division multiplier, (ii) the pulse width integrated multiplier, (iii) the double single slope multiplier and (iv) the pulse position sampled multiplier.If the width of a pulse train is made proportional to one voltage and the amplitude of the pulses to a second voltage, then the average value of the pulse waveform is proportional to the product of the two voltages, and is called the time division multiplier or the sigma-delta multiplier [1]. A pulse train of ON time proportional to one voltage is generated. Another voltage is integrated during the ON time of the pulse. The peak value of the integrated output is proportional to the product of the two voltages. This is called the pulse width integrated multiplier [2]. A short pulse train whose period T is proportional to one input voltage is generated. Another input voltage is integrated during the period T. The peak value of the integrated output is proportional to the product of the two input voltages. This is called the dual single slope multiplier [3]. A sawtooth wave of period T whose peak value is proportional to the one input voltage is sampled by a sampling pulse whose position over the period T is proportional to another input voltage. The sampled output is proportional to the product of two input voltages. This is called the pulse position sampled multiplier [4]. A square/triangular waveform is generated whose time period T is proportional to the one input voltage (V 1 ). Another input voltage (V 2 ) is integrated during the time period T. The peak value of the integrated output is proportional to the multiplication of V 2 V 1 . This is called a double dual slope analogue multiplier and is explained in this Letter.There are several ways for analogue division: (i) an antilogue network configuration; (ii) dividers using a field effect transistor (FET) [5]; the fact that an FET can be used as a voltage-dependent resistor, albeit within restricted gate-to-source voltage limits, is exploited in this method; (iii) a different method converts the input voltages to equivalent frequencies; takes the ratio of two frequencies by using conventional digital techniques, and then produces an output voltage proportional to the period of this ratio-metric signal [6]; (iv) dividers consist of four MOSFETs biased in weak inversion [7]; (v) employing a multiplier in a feedback loop of an opamp [8].A square waveform is generated whose time period T is inversely proportional to the one input voltage (V 1 ). Another input voltage (V 2 ) is integrated during the time period T. The peak value of the integrated output is proportional to the division V 2 /V 1 . This is called a double dual slo...

show abstract

A Novel Voltage Divider Circuit

Cited by 6 publications

References 6 publications

Memristor, Memcapacitor, Meminductor : Models and Experimental Circuit Emulators

Memristor, Memcapacitor, Meminductor : Models and Experimental Circuit Emulators

An Adaptative Ratio-Metric Analog-To-Digital Interface For Weakly-Coupled Resonant Sensors Based On Mutually Injection-Locked Oscillators

Double dual slope multiplier‐cum‐divider

Contact Info

Product

Resources

About