A parallel algorithm for graph matching and its MasPar implementation

Abstract

Search of discrete spaces is important in combinatorial optimization. Such problems arise in artificial intelligence, computer vision, operations research, and other areas. For realistic problems, the search spaces to be processed are usually huge, necessitating long computation times, pruning heuristics, or massively parallel processing. We present an algorithm that reduces the computation time for graph matching by employing both branch-and-bound pruning of the search tree and massively-parallel search of the as-yet-unpruned portions of the space. Most research on parallel search has assumed that a multiple-instructionstream/multiple-data-stream (MIMD) parallel computer is available. Since massively parallel single-instruction-stream/multiple-datastream (SIMD) computers are much less expensive than MIMD systems with equal numbers of processors, the question arises as to whether SIMD systems can efficiently handle state-space search problems. We demonstrate that the answer is yes, and in particular, that graph matching has a natural and efficient implementation on SIMD machines.

Reducing thread divergence in a GPU‐accelerated branch‐and‐bound algorithm

“…Let suppose that the code of Example 1 is executed by 32 threads, pool [thread_idx].begin is equal to 0 for the first thread, and pool [thread_idx].begin is not equal to 0 for the other 31 threads. When the first thread executes the statement "time = TimeArrival [1];", all the other 31 threads remain idle. Therefore, the GPU cores on which these 31 threads are executed remain idle and cannot be used during the execution of the statement "time = TimeArrival [1];".…”

“…When the first thread executes the statement "time = TimeArrival [1];", all the other 31 threads remain idle. Therefore, the GPU cores on which these 31 threads are executed remain idle and cannot be used during the execution of the statement "time = TimeArrival [1];".…”

“…For this reason, over the last decades, parallel computing has been identified as an attractive way to deal with larger instances of COPs. However, although many contributions have been proposed for parallel B&B methods using massively parallel processors [1], networks or clusters of workstations [2], and SMP machines Dynamic warp formation (DWF) [9] is a hardware mechanism proposed in order to improve the efficiency of SIMD branch execution. Every cycle the thread scheduler recomposes warps from the active threads by grouping those that are executing the same path into the same warp.…”

“…For this reason, over the last decades, parallel computing has been identified as an attractive way to deal with larger instances of COPs. However, although many contributions have been proposed for parallel B&B methods using massively parallel processors [1], networks or clusters of workstations [2], and SMP machines 1122 I. CHAKROUN ET AL. [3] to the best of our knowledge, no contribution has been proposed for designing B&B algorithms on graphical processing units (GPUs).…”

Graphics processing unit‐accelerated bounding for branch‐and‐bound applied to a permutation problem using data access optimization

“…The design and implementation of parallel B&B is strongly influenced by the computing platform [1]. Many contributions have been proposed for the design and implementation of parallel B&B methods using massively parallel processors [2], networks or clusters of workstations [3,4] and Shared Memory or SMP machines [5]. The proposed approaches are based on three parallel models presented in [6]: parallel application of the operators on the generated subproblems (Type 1), parallel building and exploration of a B&B tree (Type 2), and parallel (cooperative or independent) building and exploration of several B&B trees (Type 3).…”