A physics-based compact model for SCR devices used in ESD protection circuits

Mertens, Robert; Rosenbaum, Elyse

doi:10.1109/irps.2013.6531947

Cited by 31 publications

(11 citation statements)

References 10 publications

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“…In all cases, the model equations must be numerically well conditioned, e.g., lacking singularities, so that convergence problems do not arise during circuit simulation [16], [52].…”

Section: Compact Modelsmentioning

confidence: 99%

Compact Models for Simulation of On-Chip ESD Protection Networks

Rosenbaum,

Huang,

Drallmeier

et al. 2024

IEEE Trans. Electron Devices

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Technology scaling and increased data rates make it near impossible to achieve historic levels of electrostatic discharge (ESD) robustness. This heightens the need for pre-Si verification that a design's ESD level is above a critical value, below which the yield loss and the number of field returns are expected to be high. Transient simulation plays a role in ESD design verification and requires the availability of accurate compact models of the various semiconductor devices, which lie along the discharge path. The compact models included in a foundry process design kit (PDK) are not accurate at ESD current levels. This article describes compact models that have been developed in the ESD device research community. It reviews the measurements used to characterize ESD protection devices and acquire data for model parameter extraction. It is concluded that obtaining accurate measurement data is challenging and this impedes the widescale adoption of ESD compact models.

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“…In all cases, the model equations must be numerically well conditioned, e.g., lacking singularities, so that convergence problems do not arise during circuit simulation [16], [52].…”

Section: Compact Modelsmentioning

confidence: 99%

Compact Models for Simulation of On-Chip ESD Protection Networks

Rosenbaum,

Huang,

Drallmeier

et al. 2024

IEEE Trans. Electron Devices

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“…An accurate SCR model is highly desirable in on-chip ESD protection design. Previous studies modeled SCRs by aggregating conventional bipolar junction transistor (BJT) models and adding extra physical models that conventional BJT models fail to support [2,3]. However the auxiliary models are mostly complicated and need much efforts to develop in behavioral languages like Verilog-A.…”

Section: Dear Editormentioning

confidence: 99%

“…However, in conventional SCR's equivalent circuit, only BJTs exists and their inherent weak-avalanche models are insufficient to model collector-base junction breakdown [6]. Moreover, because of conventional SCR's unique conduction mechanism, the impedance change caused by collector currents should also be modeled [2]. To solve these problems, this paper added some standard SPICE elements into the equivalent circuit and developed a compact conventional SCR model that supports both transmission line pulse (TLP) and direct current (DC) measurements.…”

Section: Dear Editormentioning

confidence: 99%

A compact SCR model using advanced BJT models and standard SPICE elements

Cao

Wang

et al. 2016

Sci. China Inf. Sci.

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“…Thus, specific models need to be developed for these gate-controlled SCR devices. In the modeling process of ESD, two types of models are commonly used, namely, physics-based models with complex code [9][10][11][12][13][14][15][16], and simplified behavioral models [17,18]. Typically, physics-based models call for the development of complex parameter extraction methods based on high-current physical mechanisms.…”

Section: Introductionmentioning

confidence: 99%

Principle and verification of behavior model of gate-controlled SCR with adjustable on-resistance

Bao,

Wang,

Liu

et al. 2024

Eng. Res. Express

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This paper delineates the implementation of a gate-controlled Silicon Controlled Rectifier (SCR) behavioral model using Cadence software. The model is designed to tackle the absence of gate-control effect characteristics in extant models. This enables more precise simulation of the snapback behavior of such gate-controlled SCR devices under electrostatic discharge (ESD) stress. This work fabricates three types of SCR devices: Traditional SCR(T-SCR), Single-Gate SCR (SG-SCR), and a Double-Gate SCR (DG-SCR). These devices are fabricated using the 0.18µm CMOS process and varied in the number of gates. The physical principles of the device are validated through two-dimensional electrical simulations. Furthermore, the model results are confirmed by the transmission line pulse (TLP) test results of the final device. The results demonstrate that the simulation results of the gate-controlled SCR behavioral model fit the TLP test results of the three SCR devices. The model's applicability across different number of fingers devices confirms its scalability. Further, the model was simulated with the HBM equivalent circuit, and the comparison with the actual results confirmed the model's applicability to HBM simulation.

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A physics-based compact model for SCR devices used in ESD protection circuits

Cited by 31 publications

References 10 publications

Compact Models for Simulation of On-Chip ESD Protection Networks

Compact Models for Simulation of On-Chip ESD Protection Networks

A compact SCR model using advanced BJT models and standard SPICE elements

Principle and verification of behavior model of gate-controlled SCR with adjustable on-resistance

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