A Physics-Based Compact Model of SiC Power MOSFETs

Kraus, R.; Castellazzi, Alberto

doi:10.1109/tpel.2015.2488106

Cited by 74 publications

(25 citation statements)

References 23 publications

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“…In the literature, also other approaches to determine the junction temperature can be found. These are first numerical calculations based on equations which describe semiconductor physics [3,16]. For the SiC MOSFET in short-circuit mode, this is shown in [3] achieving comparable values for the critical temperature at destruction.…”

Section: Simulation Resultsmentioning

confidence: 99%

A Structural Based Thermal Model Description for Vertical SiC Power MOSFETs under Fault Conditions

Maerz

Bertelshofer

Bakran

2016

Active and Passive Electronic Components

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The accurate prediction of the SiC MOSFET withstanding time for single fault events greatly influences the requirements for device protection circuits for these devices in power converter applications, like voltage source inverters or power electronic transformers. For this reason, a thermal model, based on the structural design and the physical dimensions of the chip as well as material properties of 4H-SiC, is proposed. This article gives a general description of the thermal behaviour of vertical SiC MOSFET under various driving and boundary conditions in case of a short-circuit event. The thermal model substitutes destructive tests of a device for an individual set of boundary conditions of an occurring fault event. The validity of the analytically parametrised thermal model is verified by experimental short-circuit tests of state-of-the-art vertical SiC MOSFETs for a set of various boundary conditions. The investigated thermal model can furthermore be used to standardise different gate-oxide degradation values from the literature for means of lifetime prediction of the gate oxide for an individual application under repetitive occurring fault or overload conditions. These manufacturer specific reported values measured with no standardised testing procedures can be translated into a maximum junction temperature, which is repeatedly reached. The thermal model therefore provides a unifying parameter for the gate-oxide lifetime calculation for an individual chip and application.

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Section: Simulation Resultsmentioning

confidence: 99%

A Structural Based Thermal Model Description for Vertical SiC Power MOSFETs under Fault Conditions

Maerz

Bertelshofer

Bakran

2016

Active and Passive Electronic Components

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“…In [11] and [12], the temperature-dependent effects are described by E TEMP and G TEMP . In [16], authors also asserted that the influence of a variable temperature on the model parameters is taken into account, but none of parameters in the model can be found to be temperature-dependent, only a thermal equivalent circuit is used to simulate the self-heating. In our model, these effects are described by the temperature-dependent mobility components μ AC and μ C , temperature-dependent threshold voltage (expressed by 2.437-0.0057*T, obtained by fitting with C2M0080120D datasheet), so we removed E TEMP and G TEMP in Fig.…”

Section: The Modeling For Field and Temperature Dependence Based Omentioning

confidence: 99%

“…Aside from the Coulombic scattering, roughness scattering also brings strongly influences on the carrier mobility. In [16], the influence is claimed to be included in the current equation, but is not explicitly accounted for. In our model, the roughness scattering is directly related with the effective perpendicular electric field.…”

Section: The Modeling For Field and Temperature Dependence Based Omentioning

confidence: 99%

“…The model is constructed in HiSIM_HV, a power MOSFET model developed by Hiroshima University based on surface-potential based MOSFET model [15]. Kraus et al, developed a physics-based compact model of SiC MOSFET including the dependence of channel charge and electron mobility on the charge of interface traps in circuit simulator PSpice [16]. However, many fitting parameters were used in this model, and the effect of interface traps can not be obviously found in the expressions which describe the behavior of SiC MOSFET.…”

Section: Introductionmentioning

confidence: 99%

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SPICE Modeling of SiC MOSFET Considering Interface-Trap Influence

et al. 2018

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SPICE modeling of silicon carbide (SiC) MOSFET considering the influence of interface traps has been carried out, which is able to describe the characteristics of the MOS transistors in all operation modes at different interface trap densities and measurement temperatures. This modeling employs the SPICE level-1 model of MOSFET, but the constant mobility in the piecewise current equations has been replaced by the advanced mobility expression, which can exactly reflect the effect of SiC/SiO 2 interface traps on the electrical characteristics of SiC MOSFET. Key parameters in the advanced mobility model are obtained according to charge-sheet model (CSM) of MOS system. The static characteristics of the developed SiC MOSFET model have been validated with the production Datasheet, and the dynamic characteristics have been experimentally verified in Boost converter. Based on the developed model, the effect of SiC/SiO 2 interface-trap densities on the switching performances of SiC MOSFET has been quantitatively discussed, and reasonable gate driving voltage of SiC MOSFET with different interface-trap densities has been revealed.

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“…The dimensions and material properties are obtained according to the published article [4]. The dimension and doping concentration of the embedded p-layer, which are not described in [4], are determined referring to [10][11][12][13]. Current flows upwards, from the bottom (drain) to top (source), in the figure.…”

Section: Tcad Simulationmentioning

confidence: 99%

Modeling of interelectrode parasitic elements of V-groove SiC MOSFET

Zhou

Shintani

Hiromoto

et al. 2018

NOLTA

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We propose a physics-based model of interelectrode parasitic elements of a Vgroove SiC power MOSFET with buried players. The proposed model considers the voltage dependence of parasitic resistances and capacitances on the basis of the observations through technology computer aided design (TCAD) simulations. The gate-voltage dependence of the body diode is also modeled in accordance with device physics. Through comparison with measurement results, it is demonstrated that the proposed model successfully reproduces both I-V and C-V characteristics. The transient behavior using a buck converter is also well reproduced.

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A Physics-Based Compact Model of SiC Power MOSFETs

Cited by 74 publications

References 23 publications

A Structural Based Thermal Model Description for Vertical SiC Power MOSFETs under Fault Conditions

A Structural Based Thermal Model Description for Vertical SiC Power MOSFETs under Fault Conditions

SPICE Modeling of SiC MOSFET Considering Interface-Trap Influence

Modeling of interelectrode parasitic elements of V-groove SiC MOSFET

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