2001
DOI: 10.1016/s0038-1101(00)00246-x
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A process simplification scheme for fabricating self-aligned silicided trench-gate power MOSFETs

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Cited by 4 publications
(4 citation statements)
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“…The self-aligned silicide (salicide) process is used to form a silicided trench-gate power MOSFET [11]. Figure 1 shows the primary fabrication process flow for the power MOSFET with the SiGe channel region.…”
Section: Device Fabricationmentioning
confidence: 99%
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“…The self-aligned silicide (salicide) process is used to form a silicided trench-gate power MOSFET [11]. Figure 1 shows the primary fabrication process flow for the power MOSFET with the SiGe channel region.…”
Section: Device Fabricationmentioning
confidence: 99%
“…Moreover, further reduction in the specific on-resistance and increase of the channel density are the primary goals for this type of power MOSFET, when an acceptable blocking voltage is still obtained. A fully self-aligned trench-gate MOSFET technology that permits a significant increase in the packing density was previously developed [11]. In addition, a device scheme with the dual-doped body region was also proposed for further reduction in the specific on-state resistance [12].…”
Section: Introductionmentioning
confidence: 99%
“…The silicon MOSFET has become the dominant device technology for these applications. Due to its many attractive features, there has been a concerted effort to optimize its structure, design, and process technology [2][3][4][5][6][7][8][9][10]. For instance, it has high input impedance due to its metal-oxide-semiconductor gate structure.…”
Section: Introductionmentioning
confidence: 99%
“…Even greater reduction in the specific on-resistance has been achieved by utilizing trench structures [5][6][7][8][9]. However, the blocking voltage may be would be limited by the high electric field near the trench corner.…”
Section: Introductionmentioning
confidence: 99%