2016 11th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC) 2016
DOI: 10.1109/recosoc.2016.7533911
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A programming model for reconfigurable computing based in functional concurrency

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Cited by 3 publications
(5 citation statements)
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“…There are some constructs of VHDL that have not been implemented in ReWire (e.g., tri-state bu ers, multiple clock domains, etc.). We believe such constructs can be readily modeled in ReWire, but they have not been necessary for previous case studies [84,83,43,42,47,46].…”
Section: Related Workmentioning
confidence: 99%
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“…There are some constructs of VHDL that have not been implemented in ReWire (e.g., tri-state bu ers, multiple clock domains, etc.). We believe such constructs can be readily modeled in ReWire, but they have not been necessary for previous case studies [84,83,43,42,47,46].…”
Section: Related Workmentioning
confidence: 99%
“…The organizing principle underlying ReWire are reactive resumption monads with state [44] (RRMS), which encapsulate a notion of computation appropriate to hardware-namely, synchronous parallelism. RRMS support the expression of structural hardware designs in a functional style [47]. RWC is a computational λ-calculus whose syntax and semantics formalizes RRMS in Coq.…”
Section: Background: Monad Transformersmentioning
confidence: 99%
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