A Prolog-Based Hardware Development Environment

Benkrid, Khaled; Crookes, Danny; Benkrid, A.; Belkacemi, S.

doi:10.1007/3-540-46117-5_39

Cited by 5 publications

(1 citation statement)

References 4 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The design of custom processing systems for those platforms is not supported by high-level visual design tools, and require specific design using the conventional HDL-based design flow supported by the FPGA development tools. Existing design systems based on visual data-flow design entry are technology dependent and not specifically designed for this domain of application (Xilinx System Generator [5,3]), while others specifically designed for image processing use close and proprietary design environments [1,2].…”

Section: Introductionmentioning

confidence: 99%

A high-level tool for the design of custom image processing systems

Martins¹,

Alves²

8th Euromicro Conference on Digital System Design (DSD'05)

View full text Add to dashboard Cite

Real-time image processing is a computational intensive task with applications in various engineering fields. In several image processing applications, a significant amount of computing power is committed to image enhancement operations, basic segmentation and identification of regions of interest for further analysis. Such type of front-end processing can be done efficiently by custom data-flow processors closely coupled to an image sensor. This paper proposes a visual design environment to support the high-level design of custom data-flow processors for real-time image analysis applications. The tool is embedded in Matlab/Simulink, and the system modeling is done using a library of blocks that implement common low-level image processing operations. Functional validation is performed efficiently by the simulation engine of Simulink in a frame by frame basis, using the functions provided by the image processing toolbox in Matlab. The automatic generation of a synthesizable RTL model guarantees a logic implementation of the system that complies to the high-level model validated, under constraints imposed by the user and the target reconfigurable device.

show abstract

Section: Introductionmentioning

confidence: 99%