2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines 2015
DOI: 10.1109/fccm.2015.24
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A Reconfigurable Multiclass Support Vector Machine Architecture for Real-Time Embedded Systems Classification

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Cited by 6 publications
(13 citation statements)
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“…Two approaches were presented, the multi-class support vector machine polynomial kernel and multi-class support vector machine Linear Kernel using "winner take all". Even though, the results of using the one-versus-all or "winner take all" produced remarkable results; 98.57% for the polynomial kernel and 97.04% for the linear kernel, Kane et al [25] points out usefulness for a one-versus-one multi-class SVM for real-time FPGA implementation, as it requires minimal on-board memory during training.…”
Section: Related Workmentioning
confidence: 99%
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“…Two approaches were presented, the multi-class support vector machine polynomial kernel and multi-class support vector machine Linear Kernel using "winner take all". Even though, the results of using the one-versus-all or "winner take all" produced remarkable results; 98.57% for the polynomial kernel and 97.04% for the linear kernel, Kane et al [25] points out usefulness for a one-versus-one multi-class SVM for real-time FPGA implementation, as it requires minimal on-board memory during training.…”
Section: Related Workmentioning
confidence: 99%
“…Kane et al [25] proposed the first ever fully pipelined, floating point based, multi-use reconfigurable hardware ar-chitecture designed to act in conjunction with embedded processing as an accelerator for multi-class SVM classification. Their implementation show the benefits of one-versus-one against one-versus-all for real-time applications.…”
Section: Related Workmentioning
confidence: 99%
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“…Works that targeted on accelerating SVM with a coprocessor unit [1], [10]- [12] tend to focus on the kernel due to its compute-intensive task and also its innate nature to be parallelize. Prior work by Kane et al [13] implemented a generic SVM classification architecture that was tested with a wide variety of datasets. However, the analysis is only limited to comparison with software implementations only.…”
Section: Introductionmentioning
confidence: 99%
“…al 9 state that the computational process of Support Vector Machine classification suffers greatly from a large number of iterative mathematical operations and an overall complex algorithmic structure. Their work proposed a fully pipelined, floating point based, multi-use reconfigurable hardware architecture designed to act in conjunction with embedded processing as an accelerator for multiclass SVM classification.…”
Section: Related Workmentioning
confidence: 99%