A ReRAM-Based Nonvolatile Flip-Flop With Self-Write-Termination Scheme for Frequent-OFF Fast-Wake-Up Nonvolatile Processors

Lee, Albert; Lo, Chieh-Pu; Lin, Chien-Chen; Chen, Wei-Hao; Hsu, Keh‐Ying; Wang, Zhen; Su, Fang; Yuan, Zhe; Wei, Qi; King, Ya‐Chin; Lin, Chao-An; Lee, Hochul; Amiri, Pedram Khalili; Wang, Kang-Lung; Wang, Yu; Yang, Huazhong; Liu, Yongpan; Chang, Meng-Fan

doi:10.1109/jssc.2017.2700788

Cited by 43 publications

(28 citation statements)

References 29 publications

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“…Figure. 3 [11,[33][34][35]. Contrary to con guration data, intermediate data are frequently refreshed and the data ip frequency can be hundreds of mega hertz (MHz).…”

Section: Fpga and Energy Harvesting Systemmentioning

confidence: 99%

“…erefore, the NVMs writing and reading time may bring delay which hinders the FPGA work frequency. It is observed that a 65nm technology based ReRAM NV-FF has achieved writing time as good as 4µs seconds and 46.2 pico joul per bit [11]. Meanwhile, a regular FPGA usually works at hundreds of MHz, i.e working under ns clock period.…”

Section: Fpga and Energy Harvesting Systemmentioning

confidence: 99%

“…e NVM brings non-volatility but also larger logic area. It is observed in [11] that a NV-FF based processor has an extra 39% area for a single FF but less than 10% extra area for the whole chip. e 39% single FF area overhead is brought by the NVM's control logic and the NVM is growing on the top of the chip, which won't bring extra area.…”

Section: Fpga and Energy Harvesting Systemmentioning

confidence: 99%

“…Existing designs preserve chip state by placing checkpoints in computation [17-19, 22-24, 42] Preserving the data for the entire chip may also be an option [11]. By triggering writing and retrieving of ip-ops in all FPGA SLICEs, all the data on chip can be fully reserved.…”

Section: Motivationmentioning

confidence: 99%

“…To reserve intermediate data, non-volatile ip-ops (NV-FFs) have been integrated on processors. Such non-volatile processor freezes all registers data locally on the chip if it is shut o [11]. e success of NV-FFs in processors makes it a good candidate for FPGA ip-op.…”

Section: Introductionmentioning

confidence: 99%

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Low Overhead Online Checkpoint for Intermittently Powered Non-volatile FPGAs

Zhang

Patterson

Liu

et al. 2018

2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

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Energy harvesting is an a ractive way to power future IoT devices since it can eliminate the need for ba ery or power cables. However, harvested energy is intrinsically unstable. While FPGAs have been widely adopted in various embedded systems, it is hard to survive unstable power since all the memory components in FPGA are based on volatile SRAMs. e emerging non-volatile memory based FPGAs provide promising potentials to keep con guration data on the chip during power outages. Few works have considered implementing e cient runtime intermediate data checkpoint on non-volatile FPGAs. To realize accumulative computation under intermi ent power on FPGA, this paper proposes a low-cost design framework, Data-Flow-Tracking FPGA (DFT-FPGA), which utilizes binary counters to track intermediate data ow. Instead of keeping all on-chip intermediate data, DFT-FPGA only targets on necessary data that is labeled by o -line analysis and identi ed by an online tracking system. e evaluation shows that compared with state-of-the-art techniques, DFT-FPGA can realize accumulative computing with less o -line workload and signi cantly reduce online roll-back time and resource utilization. is paper has been accepted by ACM Journal on Emerging Technologies in Computing Systems (JETC).

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“…Figure. 3 [11,[33][34][35]. Contrary to con guration data, intermediate data are frequently refreshed and the data ip frequency can be hundreds of mega hertz (MHz).…”

Section: Fpga and Energy Harvesting Systemmentioning

confidence: 99%

Section: Fpga and Energy Harvesting Systemmentioning

confidence: 99%

Section: Fpga and Energy Harvesting Systemmentioning

confidence: 99%

Section: Motivationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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