A Scalable and Programmable Modular Traffic Manager Architecture

Abstract

A key issue in the design of next-generation Internet routers and switches will be provision of Traffic Manager (TM) functionality in the datapaths of their high-speed switching fabrics. A new architecture that allows dynamic deployment of different TM functions is presented. By considering the processing requirements of operations such as policing and congestion, queuing, shaping, and scheduling, a solution has been derived that is scalable with a consistent programmable interface. Programmability is achieved using a function computation unit which determines the action (e.g., drop, queue, remark, forward) based on the packet attribute information and a memory storage part. Results of a Xilinx Virtex-5 FPGA reference design are presented.

An On-Demand Queue Management Architecture for a Programmable Traffic Manager

“…The FPGA -based MATMUNI system concentrates on network-on-chip rather than TM aspects [14]. A 1Gbps TM FPGA-based reference design [9] employs a brute-force approach for per-flow queue management with limited scalability for higher speeds. Single point, FPGA-based packet processing solutions for traffic shaping, high speed RED and queue management also exist [15], [16].…”

“…Based on the available data [9], [20], [25], [30], Table III gives typical memory utilization of two per-flow QM techniques. Compared to brute-force, it decreases substantially for active OD-QM; the number of active flows at 90% link capacity is much smaller than the average number of in-progress flows, independent of link speed; thus OD-QM is able to reduce the memory to a few Mbits leading to a scalable solution for per-flow TM in future networks.…”

“…For example, if changes from 4 M to 4 G bits and has a length of 64 bits, then (8) Hence, belongs an interval [16], [26] and the required queuing buffer size, , of dynamic buffering is (9) We have the total required memory resource in a PA-QM…”

“…TM solutions have restrictive proprietary, fixed architectures which limit their application to future networks needs [8] and in managing costly queues, limiting scalability as traffic increases [9]. For example for fixed-sized, isolated queues, at least 3.75 Gbits of external memory is needed for per-flow queuing of 960 k flows.…”

A High-Speed, Scalable, and Programmable Traffic Manager Architecture for Flow-Based Networking

“…Traffic managers are usually located in a line card, providing the necessary queuing and scheduling functionalities for the incoming traffic in network processing units (NPUs) [13]- [15]. Packet scheduling is a demanding task dealing with priorities that are implicit and that depend on several factors, for example, protocols, traffic intensity, congestion, etc.…”