2018
DOI: 10.1149/2.0141806jss
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A Silicon-Embedded Inductor Surrounded by Porous Silicon for Improved Quality Factor

Abstract: A Backside Silicon-Embedded Inductor (BSEI) surrounded by porous silicon (PS) is reported for quality factor (Q) improvement. Successful formation of a conformal PS layer surrounding deep trenches (where the inductor coil is accommodated) is demonstrated. Experimental results show that although the DC resistance of the BSEI surrounded by PS is 73% higher than the conventional BSEI due to the non-optimized process, a 24% improvement in the peak Q and an 86% increase in the peak Q frequency can be achieved.

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Cited by 2 publications
(1 citation statement)
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“…It was experimentally demonstrated that the BSEI surrounded by PS with an 8 µmthick conformal PS layer surrounding deep silicon trenches can be successfully realized. In addition, the experimental characterization results showed that a 24% improvement in the Qmax and an 86% increase in the Qmax frequency were still achieved even if the process is not optimized yet (14). This demonstrates that PSi is also promising for integrated power management applications.…”
Section: Psi For 3d Backside Silicon-embedded Inductorsmentioning
confidence: 90%
“…It was experimentally demonstrated that the BSEI surrounded by PS with an 8 µmthick conformal PS layer surrounding deep silicon trenches can be successfully realized. In addition, the experimental characterization results showed that a 24% improvement in the Qmax and an 86% increase in the Qmax frequency were still achieved even if the process is not optimized yet (14). This demonstrates that PSi is also promising for integrated power management applications.…”
Section: Psi For 3d Backside Silicon-embedded Inductorsmentioning
confidence: 90%