In this paper, we study the electrochemical anodization of n-type heavily doped 4 H-SiC wafers in a HF-based electrolyte without any UV light assistance. We present, in particular, the differences observed between the etching of Si and C faces. In the case of the Si face, the resulting material is mesoporous (diameters in the range of 5 to 50 nm) with an increase of the ‘chevron shaped’ pore density with depth. In the case of the C face, a columnar morphology is observed, and the etch rate is twice greater than for the one for the Si face. We've also observed the evolution of the potential for a fixed applied current density. Finally, some wafer defects induced by polishing are clearly revealed at the sample surfaces even for very short etching times.

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The evolution of porous silicon (PSi) from its early studies in the late 70’s toward its industrial application in microelectronics is described in this article. The way this material can be integrated now in many devices at a wafer level is shown in this paper through examples of prototypes that include PSi in their fabrication process. For instance, realization of devices on large area wafers in the field of RF passive components, energy micro-sources or porous flexible membranes are described. In this paper, we also show recent advances in the field of PSi etching and integration at an industrial level. In particular, we put an emphasis on reproducibility and homogeneity issues, on the wafer warp management using different annealing procedures.

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