A simple CMOS bandgap reference circuit with sub-1-V operation

Navarro, João Adolfo Caldas; Ishibe, Eder Issao

doi:10.1109/iscas.2011.5938059

Cited by 9 publications

(7 citation statements)

References 6 publications

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“…In this work, the topology of [3] is applied and the design is done through a metaheuristic algorithm, incorporating a temperature coefficient adjustment block (TCA block). This block proved to be an important feature to obtain a reduced TC, the main goal of reference source circuits.…”

Section: Discussionmentioning

confidence: 99%

“…With the purpose of improving the topology some modification done in [3] are also applied here. The modifications include the addition of cascode transistors to the current mirrors (M N3 , M P3 , M P8 , and M P9 , Fig.…”

Section: B Modified Topologymentioning

confidence: 99%

“…In [3] is proposed a circuit topology of a bandgap reference source that employs current summation. This topology has simple design characteristics, supports low voltage power supplies, and provides satisfactory stability, power consumption, and area.…”

Section: Introductionmentioning

confidence: 99%

“…In this work the bandgap topology of [3] is applied and the circuit design is done through metaheuristic algorithms [4]. Additionally, a temperature coefficient adjustment block is employed in order to improve the reference source characteristics.…”

Section: Introductionmentioning

confidence: 99%

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A CMOS Bandgap Reference Circuit with a Temperature Coefficient Adjustment Block

Ishibe¹,

Navarro²

2020

JICS

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A bandgap reference voltage source with a temperature coefficient adjustment block was proposed. The bandgap topology employs current summation and the circuit was designed through metaheuristic algorithms in a 0.35-mm CMOS technology. Simulations with typical parameters show that the designed circuit has temperature coefficient of 15 ppm/0C, line regulation of 263 ppm/V, and current consumption of 2.71 uA in 1.0 V power supply. An additional 3-bit temperature adjustment block allowed keeping the temperature coefficient values lower than 26.6 ppm/0C for 90% of the circuits, without interfering with the reference voltage output or line regulation values.

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Section: Discussionmentioning

confidence: 99%

Section: B Modified Topologymentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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A CMOS Bandgap Reference Circuit with a Temperature Coefficient Adjustment Block

Ishibe¹,

Navarro²

2020

JICS

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“…The mismatch results in the bias circuit are due to the current mirror mismatch formed by M 3 , M 4, and the opamp offset (Navarro & Ishibe, 2011). We have proposed a modified beta multiplier to solve these problems, as shown in Figure 1(b).…”

Section: Proposed Beta-multipliermentioning

confidence: 99%

A 261mV Bandgap reference based on Beta Multiplier with 64ppm/0C temp coefficient

Nagulapalli

Yassine

Barker

et al. 2021

International Journal of Electronics Letters

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In this paper, a low voltage bandgap reference circuit has been proposed. The introduction of a modified beta multiplier bias circuit decreased the mismatch caused by the PMOS transistors opamp contribution. By shifting the fixed resistors to the NMOSs drain side, the beta multiplier bias minimised threshold mismatch between the two NMOS transistors. A 200-point MC simulation showed a 0.9 mV standard deviation, with a 0.34% accuracy. The simulated temperature coefficient was 64 ppm/ 0 C. The proposed circuit consumed 5.04 µW of power from a 0.45 V power supply voltage. A prototype was implemented in 65 nm CMOS technology occupying a 2888 µm 2 silicon area, with the nominal value of the reference at 261 mV.

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