2004
DOI: 10.1109/jssc.2004.825260
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A single-chip optical CMOS detector with in-situ demodulating and integrating readout for next-generation optical storage systems

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Cited by 4 publications
(2 citation statements)
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“…It is, however, in line with near-future advances in technology as predicted in [24,25] or it can be custom designed [24][25][26][27][28][29]. Furthermore, high-speed 16-bit detectors are currently available (some of the papers referenced herein report on detectors with up to 20-bit resolution) [27][28][29][30][31][32][33][34]. These detectors introduce shot noise that is at a level of less than −48 dB and a BER of less than 10 −10 .…”
Section: B Vmm Architecture Evaluationmentioning
confidence: 99%
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“…It is, however, in line with near-future advances in technology as predicted in [24,25] or it can be custom designed [24][25][26][27][28][29]. Furthermore, high-speed 16-bit detectors are currently available (some of the papers referenced herein report on detectors with up to 20-bit resolution) [27][28][29][30][31][32][33][34]. These detectors introduce shot noise that is at a level of less than −48 dB and a BER of less than 10 −10 .…”
Section: B Vmm Architecture Evaluationmentioning
confidence: 99%
“…Thus, the power consumption of the VCSEL unit is also a fraction of a watt. Finally, according to [24,25,[32][33][34] the power consumption of the detectors can be extremely low-just a fraction of a watt. Hence, the power consumption of the VMM optical subsystems is very low and is less than one watt.…”
Section: E Power Consumptionmentioning
confidence: 99%