A Software Approach to Defeating Side Channels in Last-Level Caches

Zhou, Ziqiao; Reiter, Michael K.; Zhang, Yinqian

doi:10.1145/2976749.2978324

Cited by 111 publications

(66 citation statements)

References 33 publications

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“…CACHEBAR [97] limits the contention caused by each process as a protection for the Prime+Probe attack. Like cache partitioning, this approach works at a process resolution and may require adaptions to work in the web browser scenario.…”

Section: Other Countermeasuresmentioning

confidence: 99%

Website Fingerprinting Through the Cache Occupancy Channel and its Real World Practicality

Shusterman

Avraham

Croitoru

et al. 2020

IEEE Trans. Dependable and Secure Comput.

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Website fingerprinting attacks, which use statistical analysis on network traffic to compromise user privacy, have been shown to be effective even if the traffic is sent over anonymity-preserving networks such as Tor. The classical attack model used to evaluate website fingerprinting attacks assumes an on-path adversary, who can observe all traffic traveling between the user's computer and the secure network.In this work we investigate these attacks under a different attack model, in which the adversary is capable of sending a small amount of malicious JavaScript code to the target user's computer. The malicious code mounts a cache sidechannel attack, which exploits the effects of contention on the CPU's cache, to identify other websites being browsed. The effectiveness of this attack scenario has never been systematically analyzed, especially in the open-world model which assumes that the user is visiting a mix of both sensitive and non-sensitive sites.We show that cache website fingerprinting attacks in JavaScript are highly feasible. Specifically, we use machine learning techniques to classify traces of cache activity. Unlike prior works, which try to identify cache conflicts, our work measures the overall occupancy of the lastlevel cache. We show that our approach achieves high classification accuracy in both the open-world and the closedworld models. We further show that our attack is more resistant than network-based fingerprinting to the effects of response caching, and that our techniques are resilient both to network-based defenses and to side-channel countermeasures introduced to modern browsers as a response to the Spectre attack. To protect against cache-based website fingerprinting, new defense mechanisms must be introduced to privacy-sensitive browsers and websites. We investigate one such mechanism, and show that generating artificial cache activity reduces the effectiveness of the attack and completely eliminates it when used in the Tor Browser.

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Section: Other Countermeasuresmentioning

confidence: 99%

Website Fingerprinting Through the Cache Occupancy Channel and its Real World Practicality

Shusterman

Avraham

Croitoru

et al. 2020

IEEE Trans. Dependable and Secure Comput.

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“…In particular, introducing redundancy and randomness to the S-Box tables for AES has been proposed [18]. A custom memory manager [40], relaxed inclusion caches [31] and solutions based on cache allocation technology (CAT) such as Catalyst [29] and vCat [32] are proposed to defend against LLC contention. Sanctum [30] and Ozone [41] are new processor designs with respect to cache attacks.…”

Section: Related Workmentioning

confidence: 99%

MemJam: A False Dependency Attack Against Constant-Time Crypto Implementations

Moghimi¹,

Eisenbarth²,

Sunar³

2018

Int J Parallel Prog

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Cache attacks exploit memory access patterns of cryptographic implementations. Constant-Time implementation techniques have become an indispensable tool in fighting cache timing attacks. These techniques engineer the memory accesses of cryptographic operations to follow a uniform key independent pattern. However, the constant-time behavior is dependent on the underlying architecture, which can be highly complex and often incorporates unpublished features. CacheBleed attack targets cache bank conflicts and thereby invalidates the assumption that microarchitectural side-channel adversaries can only observe memory with cache line granularity. In this work, we propose MemJam, a side-channel attack that exploits false dependency of memory read-after-write and provides a high quality intra cache level timing channel. As a proof of concept, we demonstrate the first key recovery attacks on a constant-time implementation of AES, and a SM4 implementation with cache protection in the current Intel Integrated Performance Primitives (Intel IPP) cryptographic library. Further, we demonstrate the first intra cache level timing attack on SGX by reproducing the AES key recovery results on an enclave that performs encryption using the aforementioned constant-time implementation of AES. Our results show that we can not only use this side channel to efficiently attack memory dependent cryptographic operations but also to bypass proposed protections. Compared to CacheBleed, which is limited to older processor generations, MemJam is the first intra cache level attack applicable to all major Intel processors including the latest generations that support the SGX extension.

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“…Other proposals aimed to strengthen the victim application code to make it less vulnerable to CSCa attacks. This technique can be applied at the Operating System (OS) level [29,30] or at the application level using sanity verification frameworks [31,32]. Other approaches prevented cache sharing by distributing the VMs to different partitions in the cache, using either hardware [29,33] or software [34,35].…”

Section: Security and Communication Networkmentioning

confidence: 99%

Leveraging KVM Events to Detect Cache-Based Side Channel Attacks in a Virtualization Environment

Paundu

Fall

Miyamoto

et al. 2018

Security and Communication Networks

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Cache-based side channel attack (CSCa) techniques in virtualization systems are becoming more advanced, while defense methods against them are still perceived as nonpractical. The most recent CSCa variant called Flush + Flush has showed that the current detection methods can be easily bypassed. Within this work, we introduce a novel monitoring approach to detect CSCa operations inside a virtualization environment. We utilize the Kernel Virtual Machine (KVM) event data in the kernel and process this data using a machine learning technique to identify any CSCa operation in the guest Virtual Machine (VM). We evaluate our approach using Receiver Operating Characteristic (ROC) diagram of multiple attack and benign operation scenarios. Our method successfully separate the CSCa datasets from the non-CSCa datasets, on both trained and nontrained data scenarios. The successful classification also include the Flush + Flush attack scenario. We are also able to explain the classification results by extracting the set of most important features that separate both classes using their Fisher scores and show that our monitoring approach can work to detect CSCa in general. Finally, we evaluate the overhead impact of our CSCa monitoring method and show that it has a negligible computation overhead on the host and the guest VM.

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A Software Approach to Defeating Side Channels in Last-Level Caches

Cited by 111 publications

References 33 publications

Website Fingerprinting Through the Cache Occupancy Channel and its Real World Practicality

Website Fingerprinting Through the Cache Occupancy Channel and its Real World Practicality

MemJam: A False Dependency Attack Against Constant-Time Crypto Implementations

Leveraging KVM Events to Detect Cache-Based Side Channel Attacks in a Virtualization Environment

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