A study for 0.18 /spl mu/m high-density MRAM

Motoyoshi, Mizuki; Yamamura, I.; Ohtsuka, W.; Shouji, M.; Yamagishi, H.; Nakamura, M.; Yamada, H.; Tai, K.; Kikutani, T.; Sagara, Tsutomu; Moriyama, K.; Mori, H.; Fukamoto, C.; Watanabe, Mitsuhiro; Hachino, R.; Kano, Hiroshi; Bessho, K.; Narisawa, H.; Hosomi, Masanori; Okazaki, N.

doi:10.1109/vlsit.2004.1345370

Cited by 21 publications

(15 citation statements)

References 2 publications

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“…The "eye" shape is like an ellipse with pointed ends and is formed from two facing parabolas [34,38]. Combining two of these simple shapes can produce a more exotic design, such as elements that resemble the planet Saturn [47,48].…”

Section: Lozengementioning

confidence: 99%

Magnetic Random Access Memory for Embedded Computing

Donohoe¹

2007

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Public reporting burden for this collection of information is estimated to average 1 hour per response, including the time for reviewing instructions, searching existing data sources, gathering and maintaining the data needed, and completing and reviewing this collection of information. MRAM_II_2007-Final SPONSORING / MONITORING AGENCY NAME(S) AND ADDRESS(ES) 10. SPONSOR/MONITOR'S ACRONYM(S)Air Force Research Laboratory AFRL/RVSE Space Vehicles Directorate 3550 Aberdeen Ave. SE SPONSOR/MONITOR'S REPORTKirtland AFB, NM 87117-5776 NUMBER(S) AFRL-RV-PS-TR-2007-1196 DISTRIBUTION / AVAILABILITY STATEMENTApproved for public release; distribution is unlimited. (Clearance #VS07-0688) SUPPLEMENTARY NOTESThis report is published in the interest of scientific and technical information exchange. The established procedures for editing reports were not followed for this technical report. ABSTRACTThe goal of this research was to develop an embedded magnetic memory technology to be integrated into Complementary Metal Oxide Semiconductor (CMOS) integrated circuit fabrication process to provide radiation-hard, logic elements and small random-access memories. The goal is not to provide largescale, bulk memory, but latches and flip flops that serve as state and data registers for sequential logic, and configuration registers for configurable logic. The benefits to spacecraft systems include the ability to power-down a subsystem while retaining system state, thus saving energy until the subsystem is required. The subsystem can then be powered-up and begin operating in milliseconds. The technology is based on a unique, PacMan-shaped magnetic tunneling junction (MTJ) cell developed at the University of Idaho. The focus of this research is to refine the PacMan cell to make it practical for integration into CMOS circuits, to develop CMOS circuits that employ the magnetic cells, and to integrate the cells onto a CMOS process. The process produced two circuit designs based on magnetic memory elements: a magnetic latch, and a magnetic shadow memory to serve as a backup to volatile electronic memory. ii University of Idaho report MRAM_II_2007-Final SUBJECT TERMS CMOS, MTJ Cell

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Section: Lozengementioning

confidence: 99%

Magnetic Random Access Memory for Embedded Computing

Donohoe¹

2007

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“…However, the scaling of these charge-based memory technologies beyond 22 nm faces great challenges like high leakage power consumption and variation-induced reliability degradation. Among these, spin-transfer torque random access memory (STT-RAM) showed great potentials in embedded and off-chip applications for its zero standby power, high integration density, fast access time, and an excellent CMOS compatibility [1].…”

Section: Introductionmentioning

confidence: 99%

A Novel Self-Reference Technique for STT-RAM Read and Write Reliability Enhancement

Zhang

Wen

Joshi³

et al. 2014

IEEE Trans. Magn.

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Spin-transfer torque random access memory (STT-RAM) has demonstrated great potential in embedded and stand-alone applications. However, process variations and thermal fluctuations greatly influence the operation reliability of STT-RAM and limit its scalability. In this paper, we propose a new field-assisted access scheme to improve the read/write reliability and performance of STT-RAM. During read operations, an external magnetic field is applied to a magnetic tunneling junction (MTJ) device, generating a resistive sense signal without referring to other devices. Such a self-reference scheme offers a very promising alternative approach to overcome the severe cell-to-cell variations at highly scaled technology node. Furthermore, the external magnetic field can be used to assist the MTJ switching during write operations without introducing extra hardware overhead.Index Terms-Field-assisted spin-transfer torque (FA-STT), read/write reliability, self-reference.

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“…However, all the traditional memory technologies, e.g., SRAM, DRAM, etc., face significant scaling challenges under 45-nm technology node and beyond [2]. In recent several years, spin-transfer torque random access memory (STT-RAM), which is the improved descendant of magnetic memory, attracted increased attentions due to its unique characteristics such as nonvolatility, simple cell structure, fast read/write speed ( ns), high endurance, high array density, and excellent CMOS-compatibility and scalability [4], [5]. There are many recent works on improving STT-RAM-based memory system performance.…”

Section: Introductionmentioning

confidence: 99%

Voltage Driven Nondestructive Self-Reference Sensing Scheme of Spin-Transfer Torque Memory

Sun

Chen

et al. 2012

IEEE Trans. VLSI Syst.

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Spin-transfer torque random access memory (STT-RAM) has demonstrated great potentials as a universal memory for its fast access speed, zero standby power, excellent scalability, and simplicity of cell structure. However, large process variations of both magnetic tunneling junction (MTJ) and CMOS process severely limit the yield of STT-RAM chips and prevent the massive production from happening. In this paper, we analyze and compare the impacts of process variations on various sensing schemes of STT-RAM design. On top of it, we propose a novel voltage-driven nondestructive self-reference sensing scheme to enhance the STT-RAM chip yield by significantly improving sense margin. Monte Carlo simulations of a 16-Kb STT-RAM array shows that our proposed scheme can achieve the same yield as the previous nondestructive self-reference sensing scheme while improving the sense margin by five times with the similar access performance and power.

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A study for 0.18 /spl mu/m high-density MRAM

Cited by 21 publications

References 2 publications

Magnetic Random Access Memory for Embedded Computing

Magnetic Random Access Memory for Embedded Computing

A Novel Self-Reference Technique for STT-RAM Read and Write Reliability Enhancement

Voltage Driven Nondestructive Self-Reference Sensing Scheme of Spin-Transfer Torque Memory

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