Voltage Driven Nondestructive Self-Reference Sensing Scheme of Spin-Transfer Torque Memory

Sun, Zhenyu; Li, Hai; Chen, Yiran; Wang, Xiaobin

doi:10.1109/tvlsi.2011.2166282

Cited by 31 publications

(9 citation statements)

References 18 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…To evaluate the impact of read error rates in different sensing schemes on memory array yield, Monte Carlo simulations are conducted to obtain the sense margin distribution of three sensing schemes-FA-STT sensing, conventional nondestructive (CN) self-reference sensing [9], and conventional STT sensing (CS), which directly compares the MTJ resistance with a reference of (R L + R H )/2. A 4Kb STT-RAM array with 64 rows and 64 columns is simulated while every sense amplifier is shared by eight columns.…”

Section: B Read Operation Analysismentioning

confidence: 99%

A Novel Self-Reference Technique for STT-RAM Read and Write Reliability Enhancement

Zhang

Wen

Joshi³

et al. 2014

IEEE Trans. Magn.

Self Cite

View full text Add to dashboard Cite

Spin-transfer torque random access memory (STT-RAM) has demonstrated great potential in embedded and stand-alone applications. However, process variations and thermal fluctuations greatly influence the operation reliability of STT-RAM and limit its scalability. In this paper, we propose a new field-assisted access scheme to improve the read/write reliability and performance of STT-RAM. During read operations, an external magnetic field is applied to a magnetic tunneling junction (MTJ) device, generating a resistive sense signal without referring to other devices. Such a self-reference scheme offers a very promising alternative approach to overcome the severe cell-to-cell variations at highly scaled technology node. Furthermore, the external magnetic field can be used to assist the MTJ switching during write operations without introducing extra hardware overhead.Index Terms-Field-assisted spin-transfer torque (FA-STT), read/write reliability, self-reference.

show abstract

Section: B Read Operation Analysismentioning

confidence: 99%

A Novel Self-Reference Technique for STT-RAM Read and Write Reliability Enhancement

Zhang

Wen

Joshi³

et al. 2014

IEEE Trans. Magn.

Self Cite

View full text Add to dashboard Cite

show abstract

“…To evaluate the impact of read error rates in different sensing schemes on memory array yield, Monte-Carlo simulations are conducted to obtain the sense margin distribution of three sensing schemes -FA-STT sensing (FA-STT), conventional nondestructive self-reference sensing (CN) [12], and conventional STT sensing (CS), which directly compares the MTJ resistance with a reference of (RL + RH)/2. A 4Kb STT-RAM array with 64 rows and 64 columns is simulated while every sense amplifier is shared by eight columns.…”

Section: Sensing Marginmentioning

confidence: 99%

“…Various self-reference sensing schemes, for example, were developed to overcome the adverse impact of cell-to-cell MTJ resistance variations on the readability of STT-RAM. These designs eliminate the step of referencing to other STT-RAM cells by directly comparing the two resistance states of the same MTJ device [6] or leveraging the difference between the current dependencies of the two MTJ resistance states [12]. Such designs, however, dramatically increase the STT-RAM access latency and introduce a high peripheral circuit design complexity.…”

Section: Introductionmentioning

confidence: 99%

A new field-assisted access scheme of STT-RAM with self-reference capability

Zhang¹,

Wen²,

Joshi³

et al. 2014

2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

Self Cite

View full text Add to dashboard Cite

Spin-transfer torque random access memory (STT-RAM) has demonstrated great potentials in embedded and stand-alone applications. However, process variations and thermal fluctuations greatly influence the operation reliability of STT-RAM and limit its scalability. In this work, we propose a new fieldassisted access scheme to improve the read/write reliability and performance of STT-RAM. During read operations, an external magnetic field is applied to a magnetic tunneling junction (MTJ) device, generating a resistive sense signal without referring to other devices. Such a self-reference scheme offers a very promising alternative approach to overcome the severe cell-to-cell variations at highly scaled technology node. Furthermore, the external magnetic field can be also used to assist the MTJ switching during write operations without introducing extra hardware overhead. Simulation results show that compared to the existing self-reference scheme, our proposed design can improve the read sense margin by more than 200% and reduce the write error rate down to 2.29×10 −9 .

show abstract

“…They are associated with a sense amplifier (SA) to read the resistance difference between the two opposite MTJ cells. A number of SA were proposed [29][30] in the last years such as SRAM based SA [25], Dynamic Current Mode (DCM) based SA [21] and PreCharge SA (PCSA) [29]. Among them, PCSA (see Fig.4a) shows the best sensing reliability and power efficiency while keeping high-speed.…”

Section: B Basic Reading and Writing Circuitsmentioning

confidence: 99%

Emerging hybrid logic circuits based on non-volatile magnetic memories

Zhao

Prenat

Klein

et al. 2013

2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS)

View full text Add to dashboard Cite

As the technology node shrinks down to 90 nm and below, high power becomes one of the major critical issues for CMOS high-speed computing circuits (e.g. logic and cache memory) due to the increasing leakage currents and data traffic. Emerging non-volatile memories are under intense investigation to bring the non-volatility into the logic circuits and then eliminate completely the standby power issue. Thanks to its quasi-infinite endurance, high speed and easy 3D integration at the back-end process of CMOS IC fabrication, Magnetic RAM (MRAM) is considered as one of the most promising candidates. A number of hybrid MRAM/CMOS logic circuits have been proposed and prototyped successfully in the last years. In this introduction paper for the invited special session at NEWCAS 2013, we present an overview and current status of these logic circuits and discuss their potential applications in the future.

show abstract

Voltage Driven Nondestructive Self-Reference Sensing Scheme of Spin-Transfer Torque Memory

Cited by 31 publications

References 18 publications

A Novel Self-Reference Technique for STT-RAM Read and Write Reliability Enhancement

A Novel Self-Reference Technique for STT-RAM Read and Write Reliability Enhancement

A new field-assisted access scheme of STT-RAM with self-reference capability

Emerging hybrid logic circuits based on non-volatile magnetic memories

Contact Info

Product

Resources

About