A Study on the Use of Performance Counters to Estimate Power in Microprocessors

Rodrigues, Rance; Annamalai, A.; Koren, Israel; Kundu, Sandip

doi:10.1109/tcsii.2013.2285966

Cited by 63 publications

(31 citation statements)

References 12 publications

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“…These choices reflect similar counters to those proposed in works on desktop and server systems and appear to be reasonable, intuitive choices [11], [21]. However, the average VIF of these events is 1.68 × 10 7 and the coefficients change significantly when building the model with different sets of workloads because they are unstable (note that the last two events do not contribute to the multicollinearity problems).…”

Section: Todosupporting

confidence: 70%

“…In Step 3 (described in Section VI) we describe our robust model formulation where we use our knowledge of how power is consumed in CPUs, as opposed to adding regression coefficients directly to PMC data as is typical in existing works [11], [20], [21], [24]. Our formulation reduces multicollinearity, separates dynamic and static power consumption, works with any given voltage and frequency, and, when combined with the added model stability, allows the model building experiment duration to be reduced by 100× while trading off only 0.6% error.…”

Section: Proposed Methodologymentioning

confidence: 99%

“…Rather than simply putting the PMC data directly into a linear regression tool, as is the case in previous works [11], [20], [21], [24], we combine regression analysis with knowledge of how power is consumed within CPUs to form an intelligent and more physically-meaningful model that calculates static and dynamic power separately (2). We make the CPU cluster power our dependent variable with functions of our chosen PMC events after preprocessing (E n ), clock frequency (f clk ) and CPU voltage (V DD ) as our independent variables.…”

Section: Model Formulation and Validationmentioning

confidence: 99%

See 2 more Smart Citations

Accurate and Stable Run-Time Power Modeling for Mobile and Embedded CPUs

Walker

Diestelhorst

Hansson

et al. 2017

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

105

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Abstract-Modern mobile and embedded devices are required to be increasingly energy-efficient while running more sophisticated tasks, causing the CPU design to become more complex and employ more energy-saving techniques. This has created a greater need for fast and accurate power estimation frameworks for both run-time CPU energy management and design-space exploration. We present a statistically rigorous and novel methodology for building accurate run-time power models using Performance Monitoring Counters (PMCs) for mobile and embedded devices, and demonstrate how our models make more efficient use of limited training data and better adapt to unseen scenarios by uniquely considering stability. Our robust model formulation reduces multicollinearity, allows separation of static and dynamic power, and allows a 100× reduction in experiment time while sacrificing only 0.6% accuracy. We present a statistically detailed evaluation of our model, highlighting and addressing the problem of heteroscedasticity in power modeling. We present software implementing our methodology and build power models for ARM Cortex-A7 and Cortex-A15 CPUs, with 3.8% and 2.8% average error, respectively. We model the behavior of the nonideal CPU voltage regulator under dynamic CPU activity to improve modeling accuracy by up to 5.5% in situations where the voltage cannot be measured. To address the lack of research utilizing PMC data from real mobile devices, we also present our data acquisition method and experimental platform software. We support this work with online resources including software tools, documentation, raw data and further results.

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Section: Todosupporting

confidence: 70%

Section: Proposed Methodologymentioning

confidence: 99%

Section: Model Formulation and Validationmentioning

confidence: 99%

See 1 more Smart Citation

Accurate and Stable Run-Time Power Modeling for Mobile and Embedded CPUs

Walker

Diestelhorst

Hansson

et al. 2017

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

105

View full text Add to dashboard Cite

show abstract

“…In existing works on PMC-based run-time power models, the independent variables (i.e. PMC events and sometimes the CPU voltage (V DD ), the clock frequency (f clk and/or the temperature, T ) are inserted directly into a regression tool [9], [10], [25]- [27]; the relationships between the variables and power consumption are not considered. A recent work [27], which evaluates the state-of-the-art and typifies the general approach, proposes the model equation shown in Equation 1.…”

Section: Regression-based Modelling Methodologymentioning

confidence: 99%

Thermally-aware composite run-time CPU power models

Walker

Diestelhorst

Hansson

et al. 2016

2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)

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Abstract-Accurate and stable CPU power modelling is fundamental in modern system-on-chips (SoCs) for two main reasons: 1) they enable significant online energy savings by providing a run-time manager with reliable power consumption data for controlling CPU energy-saving techniques; 2) they can be used as accurate and trusted reference models for system design and exploration. We begin by showing the limitations in typical performance monitoring counter (PMC) based power modelling approaches and illustrate how an improved model formulation results in a more stable model that efficiently captures relationships between the input variables and the power consumption. Using this as a solid foundation, we present a methodology for adding thermal-awareness and analytically decomposing the power into its constituting parts. We develop and validate our methodology using data recorded from a quad-core ARM Cortex-A15 mobile CPU and we achieve an average prediction error of 3.7% across 39 diverse workloads, 8 Dynamic Voltage-Frequency Scaling (DVFS) levels and with a CPU temperature ranging from 31• C to 91• C. Moreover, we measure the effect of switching cores offline and decompose the existing power model to estimate the static power of each CPU and L2 cache, the dynamic power due to constant background (BG) switching, and the dynamic power caused by the activity of each CPU individually. Finally, we provide our model equations and software tools for implementing in a run-time manager or for using with an architectural simulator, such as gem5. I. INTRODUCTIONWhile mobile devices are required to be ever-more energy efficient, mobile CPU designs are becoming more complex in order to achieve the ever-increasing performance demand of new applications. Key to saving energy is the system's runtime manager (RTM), which controls CPU energy-saving techniques (such as dynamic voltage frequency scaling [DVFS] or heterogeneous cores [e.g. ARM's big.LITTLE technology]) in order to trade off power and performance based on the current conditions and requirements. However, in order to make these trade-offs effectively, run-time knowledge of how power is being consumed is essential. A fast and accurate power model, that is able to predict the current power consumption at runtime, can therefore be used with a run-time manager to make significant energy savings [1].Previously, top-down regression-based models using performance monitoring counters (PMCs) as inputs have been widely shown to be effective in estimating CPU power [2]- [13]. Topdown approaches use power measurements from real devices and predict this measured power using metrics. Therefore they

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“…The indirect approach infers energy consumption from other events that can be measured during program execution [2]. Modern architectures offer counters integrated into the hardware to collect statistics on the operation of the processor and memory system.…”

Section: Introductionmentioning

confidence: 99%

Measuring Energy

Kerrison¹,

Buschhoff²,

Nunez-Yanez³

et al. 2017

ICT - Energy Concepts for Energy Efficiency and Sustainability

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This chapter provides an introduction to quantifying the energy consumed by software. It is written for computer scientists, software engineers, embedded system developers and programmers who want to understand how to measure the energy consumed by the code they write in order to optimize for energy efficiency. We start with an overview of the electrical foundations of energy measurement and show how these are applied by reviewing the most commonly found energy sensing techniques. This is followed by a brief discussion of the signal processing required to obtain energy consumption data from sensing. We then present two energy measurement systems that are based on sensing techniques. Both can be used to directly measure the energy consumed by software running on embedded systems without the need to modify the hardware. As an alternative, regression-based techniques can be used to infer energy consumption based on monitoring events during program execution using counters monitors offered by the hardware. We introduce the foundations of regression analysis and illustrate how an energy model for an ARM processor can be built using linear regression. In the conclusion, we offer a wider discussion on what should be considered when selecting an energy measurement technique.

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A Study on the Use of Performance Counters to Estimate Power in Microprocessors

Cited by 63 publications

References 12 publications

Accurate and Stable Run-Time Power Modeling for Mobile and Embedded CPUs

Accurate and Stable Run-Time Power Modeling for Mobile and Embedded CPUs

Thermally-aware composite run-time CPU power models

Measuring Energy

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