A Subthreshold Low-Noise Amplifier Optimized for Ultra-Low-Power Applications in the ISM Band

Do, Anh-Tuan; Boon, Chirn Chye; Do, M.A.; Yeo, Kiat Seng; Cabuk, Alper

doi:10.1109/tmtt.2007.913366

Cited by 64 publications

(34 citation statements)

References 8 publications

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“…These networks were only tuned once before performing all of the main measurements and were not re-tuned for different power states. Transistors M 1 -M 4 are biased in the weak-inversion region [20], which has been shown to offer improved performance in the low GHz frequency range as compared to strong-inversion biasing. One way of accessing a transistor's overall performance is by looking at its maximum unilateral transducer gain, G TUmax [21].…”

Section: 1mentioning

confidence: 99%

“…However, it should be remembered that this impedance matching does not power match the device, and hence does not maximize the power output of the device. In cases where impedance matching is necessary, but a very low NF is not critical, impedance matching can be achieved by simply directly adding a resistor in series with the gate [20] and resonating out the gate-source capacitance as is done in Fig. 6.…”

Section: 1mentioning

confidence: 99%

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A 1-V CMOS Ultralow-Power Receiver Front End for the IEEE 802.15.4 Standard Using Tuned Passive Mixer Output Pole

Aaron¹,

Boon

Anh

et al. 2012

VLSI-SoC: Forward-Looking Trends in IC and Systems Design

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Abstract.A simple method to tune the output pole of a passive mixer is proposed which leads to up to 33 dB improvement in an IEEE 802.15.4 standard compatible receiver's IF section IIP 3 . This method is used in the design of an ultra-low power receiver front-end which consumes just 2.2 mW from a 1-V supply while achieving a SSB NF of approximately 9 dB. The energy-aware architecture allows for a 70 % reduction in the nominal power consumption (down to 0.7 mW) under strong signal conditions while improving the receiver's IIP 3 and not affecting the receiver's input matching. The receiver is designed in a 0.18-μm RFCMOS technology.

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Section: 1mentioning

confidence: 99%

Section: 1mentioning

confidence: 99%

A 1-V CMOS Ultralow-Power Receiver Front End for the IEEE 802.15.4 Standard Using Tuned Passive Mixer Output Pole

Aaron¹,

Boon

Anh

et al. 2012

VLSI-SoC: Forward-Looking Trends in IC and Systems Design

Self Cite

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“…Input matching is achieved using a series resonant network with a resistor in series. Under matched conditions, the noise figure of the matching network is 3 dB [12], and the voltage gain of the matching network is equal to the quality factor (Q) of the network. In this work, an 11.5 nH inductor was used resulting in a Q of 3.54 and a voltage gain of 11 dB.…”

Section: A the Lna And Mixersmentioning

confidence: 99%

A 1-V CMOS ultralow-power receiver front end for the IEEE 802.15.4 standard using tuned passive mixer output pole

Aaron¹,

Boon²,

Anh³

et al. 2010

2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip

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Abstmct-A novel passive mixer architecture is proposed which uses a voltage-mode passive mixer with a tuned output pole. Using this technique, it is shown that the IF section's HP3 requirements are relaxed by up to 33 dB for the IEEE 802.15.4standard. This allows for use of an ultralow power IF section without linearity compensation. The overall receiver front end consisting of an LNA, a mixer and a third-order channel-select filter is designed in 0.18 11m CMOS technology with a I-V supply voltage, and post-layout simulations show a 5 dB NF with only 1.7-mW total power consumption.

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“…In most WSN LNA designs [4][5][6], MOSFETs are usually biased in the sub-threshold region, which provides large transconductance and only consumes little power. Nevertheless, in sub-threshold region, MOSFETs produce more noise and nonlinear harmonics.…”

Section: Introductionmentioning

confidence: 99%

A low power high reliability dual-path noise-cancelling LNA for WSN applications

Hsu

Wang

2010

IEEE Custom Integrated Circuits Conference 2010

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This paper presents a dual-path noise-cancelling (DPNC) LNA, which is designed for low power wireless sensor network (WSN) applications and operates at 2.4GHz band. The proposed DPNC LNA can effectively cancel internal circuit noise while consuming less power by g m -boosted technique. The measured voltage gain and NF are 22dB and 3.7dB, respectively. IIP 3 is +8dBm and consumes 1.2mW with a 1.0V single supply. Fabricating in the 0.18ȝm standard CMOS process, the LNA occupies an active area of 0.3mm 2 .

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A Subthreshold Low-Noise Amplifier Optimized for Ultra-Low-Power Applications in the ISM Band

Abstract: A subthreshold low-noise amplifier optimized for ultra-low-power applications in the ISM band. IEEE Transactions on Microwave Theory and Techniques, 56(2), 286-292.

Cited by 64 publications

References 8 publications

A 1-V CMOS Ultralow-Power Receiver Front End for the IEEE 802.15.4 Standard Using Tuned Passive Mixer Output Pole

A 1-V CMOS Ultralow-Power Receiver Front End for the IEEE 802.15.4 Standard Using Tuned Passive Mixer Output Pole

A 1-V CMOS ultralow-power receiver front end for the IEEE 802.15.4 standard using tuned passive mixer output pole

A low power high reliability dual-path noise-cancelling LNA for WSN applications

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