A survey of value prediction techniques for leveraging value locality

Mittal, Sparsh

doi:10.1002/cpe.4250

Cited by 9 publications

(9 citation statements)

References 55 publications

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“…Here, we present a quick background on BP and refer the reader to prior works for more details on taxonomy, value locality, static BPs, comparative evaluation of multiple BPs, and discussion of commercial BPs . We discuss the BP naming scheme in Section 3.1.…”

Section: Background and Motivationmentioning

confidence: 99%

A survey of techniques for dynamic branch prediction

Mittal

2018

Concurrency and Computation

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Branch predictor (BP) is an essential component in modern processors since high BP accuracy can improve performance and reduce energy by decreasing the number of instructions executed on wrong-path. However, reducing the latency and storage overhead of BP while maintaining high accuracy presents significant challenges. In this paper, we present a survey of dynamic branch prediction techniques. We classify the works based on key features to underscore their differences and similarities. We believe this paper will spark further research in this area and will be useful for computer architects, processor designers, and researchers. KEYWORDSdynamic branch predictor, hybrid BP, neural BP, perceptron predictorside BP, pipelining, predictor accuracy, review, side BP, speculative execution, two-level BP INTRODUCTIONControl-changing instructions such as branches add uncertainty in the execution of dependent instructions and thus lead to large performance loss in pipelined processors. To offset their overhead, accurate prediction of branch outcomes is vital. Since branch misprediction incurs high latency (eg, 14 to 25 cycles 1 ) and wastes energy due to execution of instructions on wrong-path, an improvement in BP* accuracy can boost performance and energy efficiency significantly. For example, experiments on real processors showed that reducing the branch mispredictions by half improved the processor performance by 13%. 2Effective design and management of BPs, however, presents several challenges. Design of BP involves a strict tradeoff between area, energy, accuracy, and latency. An increase in BP complexity for improving accuracy may make it infeasible for implementation or offset its performance benefit. For example, a 512 KB perceptron predictor may provide lower instruction-per-cycle than its 32 KB version, 3 and a 2-cycle fully accurate BP may provide lower instruction-per-cycle than a 1-cycle partially inaccurate BP. 4 Further, due to its high access frequency, BP becomes a thermal hot-spot, 5 and hence, reducing its dynamic and leakage energy is important. Clearly, intelligent techniques are required for resolving these issues.Further, recently, researchers have demonstrated two security vulnerabilities viz., "Meltdown" and "Spectre," which exploit speculative execution feature of modern CPUs. 6-8 For example, Spectre vulnerability works on the observation that the speculative execution due to a branch misprediction may leave side effects, which can reveal sensitive data to attackers, eg, if the memory accesses performed during speculative execution depends on sensitive data, the resulting state of the cache forms a side-channel through which the sensitive data can be leaked. These vulnerabilities affect nearly every modern CPU. While avoiding speculative execution (eg, disabling branch prediction) can mitigate these vulnerabilities, it leads to significant performance loss. In light of these vulnerabilities and associated tradeoffs, a deeper study of branch predictors is definitely required. Contributions:In this ...

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Section: Background and Motivationmentioning

confidence: 99%

A survey of techniques for dynamic branch prediction

Mittal

2018

Concurrency and Computation

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“…However, due to this, programming to in-between states (10 and 01) consumes much higher (e.g., an order of magnitude) latency/energy than programming to terminal states (00 and 11) [2,20]. Due to value locality, the plaintext is likely to contain long strings of zeros or ones [36]; however, since encryption increases data randomness, the ciphertext contains many 01 and 10 pairs. In other words, encryption increases the frequency of inbetween states and thus, use of encryption increases the memory write energy significantly.…”

Section: Motivation and Challengesmentioning

confidence: 99%

A Survey of Techniques for Improving Security of Non-volatile Memories

Mittal

Alsalibi²

2018

J Hardw Syst Secur

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Due to their high-density and near-zero leakage power consumption, non-volatile memories (NVMs) are promising candidates for designing future memory systems. However, compared to conventional memories, NVMs also face more severe security threats, e.g., the limited write endurance of NVMs makes them vulnerable to write attacks. Also, the nonvolatility of NVMs allows the data to persist even after power-off, which can be accessed by a malicious agent. Further, encryption endangers NVM lifetime and performance by reducing the efficacy of redundant write avoidance techniques. In this paper, we present a survey of techniques for improving security of NVM-based memories by addressing the aforementioned challenges. We highlight the key ideas of the techniques along with their similarities and differences. This paper is expected to be useful for researchers and practitioners in the area of memory and system security.

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“…We categorize these works into three groups based on either a hardware or a software approach, as shown in Figure 1. Value prediction 2‐5 is a hardware approaches, but computation reuse 6‐16 and memoization 17‐30 can be implemented using hardware as well as software. A standard procedure to execute these techniques follows some simple steps described below: Analyze and identify the hot code (hc) of a program to concentrate your optimization effort.…”

Section: Introductionmentioning

confidence: 99%

“…All these techniques rely on the previous computation result produced by the hc. Value prediction is a speculative technique that infers the current instruction's value from the previous execution instances 4 On the other hand, computation reuse is a non‐speculative technique that stores the result of the past instruction and reuses it whenever the same instruction gets executed with the same input instances 5 …”

Section: Introductionmentioning

confidence: 99%

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Approximate function memoization

Arundhati

Jena

Pani

2022

Concurrency and Computation

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Summary Function memoization is an optimization technique that reduces a function call overhead when the same input appears again. A table that stores the previous result is searched and used to skip the repeated computation. This way, it increases the performance of the function call. In this article, we propose a software approach of function memoization to improve computing efficiency by bypassing the execution of the function implemented using approximate computing techniques. Searching overhead is a primary concern in any memoization technique proposed so far. In traditional function memoization, the input arguments are first searched in the look‐up table (LUT) for an exact match, and the corresponding result is extracted for further use. But, in this article, a decision‐making rule is proposed to help us decide whether to search the LUT or go for the actual computation. This decision‐making model is implemented through Bloom filter and Cantor's pairing function. Because Bloom filter sometimes produces false‐positive results, we suggest a simple approximation technique that searches the LUT for an approximate match rather than an exact match. The proposed model also contains a bypass algorithm implemented through C++ code that identifies the trivial computations from the input argument of the candidate function. By this, we can avoid the actual calculation and generate the result directly. Here, trivial computation identifies one or more input arguments that are either 0 or prefix±1$$ \pm 1 $$. To analyze the effectiveness of our proposed technique, we conducted several experiments using the benchmarks from the AxBench suite. We found that our result outperforms some of the methods proposed so far in terms of energy consumption and quality of results, particularly in image processing applications.

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A survey of value prediction techniques for leveraging value locality

Cited by 9 publications

References 55 publications

A survey of techniques for dynamic branch prediction

A survey of techniques for dynamic branch prediction

A Survey of Techniques for Improving Security of Non-volatile Memories

Approximate function memoization

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