2009
DOI: 10.1109/tcst.2008.2004503
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A System-on-a-Chip Implementation for Embedded Real-Time Model Predictive Control

Abstract: This paper presents a hardware architecture for embedded real-time model predictive control (MPC). The computational cost of an MPC problem, which relies on the solution of an optimization problem at every time step, is dominated by operations on real matrices. In order to design an efficient and low-cost application-specific processor, we analyze the computational cost of MPC, and we propose a limited-resource host processor to be connected with an application-specific matrix coprocessor. The coprocessor uses… Show more

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Cited by 92 publications
(55 citation statements)
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“…However, we extended our investigation and selected few existing works that had slightly closer traits to our proposed embedded designs. These designs are discussed and analyzed as follows: A closely related work was presented in [35], which proposed a hardware-software co-design design for MPC. This design comprised a microprocessor and a matrix co-processor.…”
Section: Analysis Of Existing Work On Embedded Designs For Mpcmentioning
confidence: 99%
See 1 more Smart Citation
“…However, we extended our investigation and selected few existing works that had slightly closer traits to our proposed embedded designs. These designs are discussed and analyzed as follows: A closely related work was presented in [35], which proposed a hardware-software co-design design for MPC. This design comprised a microprocessor and a matrix co-processor.…”
Section: Analysis Of Existing Work On Embedded Designs For Mpcmentioning
confidence: 99%
“…The design utilized a logarithmic number system (LNS) instead of a floating point, and a Newton's algorithm instead of a HQP, as in our design. Unlike our design, in [35], the model parameters were pre-calculated offline and stored in the microprocessor. In [8], an MPC-dedicated processor was proposed, which utilized a mix of fixed-point and floating-point numbers.…”
Section: Analysis Of Existing Work On Embedded Designs For Mpcmentioning
confidence: 99%
“…Importantly, for the simply bounded QP problem in (3) it is straighforward to compute an initial primal feasible point, which reduces algorithm complexity. A similar approach is presented in [23] where an inverse barrier is employed instead of the logarithmic barrier used here. From a theoretical perspective, the inverse barrier is not known to lead to a polynomial-time algorithm, whereas the logarithmic-barrier is [17].…”
Section: Problem Formulationmentioning
confidence: 99%
“…This approach takes advantage of recent advantages in the availability of cheap high density computer memory, capable of storing the potentially large number of affine controllers and state regions [9,24]. Another line of research has examined how advances in processor speed and/or the potential for implementation of custom designed FPGA-based compute platforms may be exploited [4,8,11,12,23,24]. The current paper is a contribution to this latter line of research and employs an online method for solving the MPC optimisation problem.…”
Section: Introductionmentioning
confidence: 99%
“…This is where the efficiency-boosting achievements of control theory in the field of MPC come to the foreground: these developments allow one to implement better control methods with less resources. Because of the improvements in algorithm efficiency, model predictive control can now be implemented on embedded hardware such as MCUs [7], [8], programmable logic controllers (PLC) [9]- [11], or field programmable gate arrays (FPGA) [4], [12], [13], etc. Efficiency improvements in nominal or deterministic MPC can be divided into two main categories [14].…”
Section: Introductionmentioning
confidence: 99%