A Tri-Slope Gate Driving GaN DC–DC Converter With Spurious Noise Compression and Ringing Suppression for Automotive Applications

Design and Integration of Beyond-10MHz High Switching Frequency DC-DC Converter

“…This voltage drop is much larger than the silicon FET converter, thus huge dead time loss P DT may occur even if the dead time is moderate. Active gate driving is used to mitigate the tradeoff between voltage/current ringing and P ST [56], [61], [62]. Conventionally, fixed gate resistance or fixed gate driving current is used, so the tradeoff cannot be solved.…”

Full Custom Design of an Arbitrary Waveform Gate Driver With 10-GHz Waypoint Rates for GaN FETs

“…Active gate drivers for GaN FETs that provide more than a simple step function can be divided into two families: threshold triggered and digitally programmable. Threshold-triggered active gate drivers have their driving strength updated through pre-defined behaviours at specific gate voltage levels; for example when the gate reaches a specific threshold voltage [6] [7] or a combination of reaching the gate threshold voltage and miller plateau voltages [8]. In principle, this analogue method could place gate drive profiles exactly where needed; however, in practice, the latency of the sense and trigger circuits limit switching speed, and the power consumption of the control circuitry can be prohibitively high [9].…”

“…For GaN-based circuits where power-circuit transients are measured in units of nanoseconds, a key specification of these drivers is the rate at which waypoints are processed and output. Most drivers are capable of providing only two [6], [7] or three [8], [9] waypoints during a 10 ns transient. A sub-GHz waypoint rate results in limited waveform shaping capability, but rates greater than 1 GHz are beyond achievable clock speeds in high-voltage CMOS silicon processes that are typically used for gate drivers.…”

Current Trends in the Development of Normally-OFF GaN-on-Si Power Transistors and Power Modules: A Review

“…Such waveform shaping techniques, on the gate or switching nodes of the GaN-based circuit, have also been implemented in the E-mode GaN driver ICs. [81][82][83][84] The primary goal of current gate driver designs is to improve reliability and power conversion efficiency and to reduce EMI noise of the GaN power devices in practical applications. As a result, dynamic adjustments of the gate driving strength for safe and efficient switching with fast dead-time corrections are active research areas.…”