2021
DOI: 10.3390/electronics10050546
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A Triple-Cascode X-Band LNA Design with Modified Post-Distortion Network

Abstract: This work proposes a novel linearized low noise amplifier (LNA) for X-band applications with flat power gain, low noise performance and enhanced linearity. In this study, a triple-cascode topology with dual-resonant network is utilized and a modified post-distortion network is introduced to improve the linearity. The LNA utilizes a subthreshold auxiliary NMOS transistor to reduce the nonlinearity with low power consumption. In addition, a methodology is proposed to predict the characteristic of the linearity p… Show more

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Cited by 6 publications
(6 citation statements)
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References 30 publications
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“…where Delta factor, |Δ| = S11 S22 -S12 S21 (2) Several authors have previously focused on refining and study of low noise amplifier. Following the references [13], [14], [15], [16]and [17] authors working on LNA optimization. However, according to the cited reference, the works reaches minimal noise figures with maximum power gain besides concludes that the input and output return loss coefficients are matching based on Sparameter resulting from ADS simulation.…”
Section: Resultsmentioning
confidence: 99%
“…where Delta factor, |Δ| = S11 S22 -S12 S21 (2) Several authors have previously focused on refining and study of low noise amplifier. Following the references [13], [14], [15], [16]and [17] authors working on LNA optimization. However, according to the cited reference, the works reaches minimal noise figures with maximum power gain besides concludes that the input and output return loss coefficients are matching based on Sparameter resulting from ADS simulation.…”
Section: Resultsmentioning
confidence: 99%
“…Cao et al 25 had presented a linearized LNA for X‐band applications with improved linearity, flat power gain and low noise performance. A linearity is improved by modified the post‐distortion network and a triple‐cascade topology was introduced with using dual‐resonant network.…”
Section: Literature Reviewmentioning
confidence: 99%
“…By inserting an inductance between the drain node of transistor M 1 and source node of transistor M 2 , it can be expressed as R L + jX L . According to Equation ( 6), the generalized derivation of −10 dB bandwidth for input matching can turn to the following equations from our previous work [22]:…”
Section: Input-stage Analysismentioning
confidence: 99%