A True 0.4-V Delta–Sigma Modulator Using a Mixed DDA Integrator Without Clock Boosted Switches

A 0.4-V 0.2 pJ/step 90-dB SNDR 20-kHz CT delta-sigma modulator using class-AB amplifier with a novel local common-mode feedback

“…Nevertheless, the best SNDR of the reported ULV audio-band CT DSMs [18,19,20,21,22,23] is 90 dB in [21] with a moderate Figure-of-Merit (FoM) under a nominal supply voltage of 0.5 V. For the ULV DT DSMs in [13,14,15,16,17], although they attain higher FoM compared to the reported CT DSMs, but the best SNDR they achieved is only 81 dB, which is insufficient for high-quality audio applications. Hence, it is challenging to design high SNDR and power-efficient DSM for ULV audio applications.…”

“…Delta-sigma modulators (DSMs) are widely used in audio applications for high-resolution analog-to-digital conversion [9,10,11]. ULV DSMs operating at a supply voltage of around 0.5 V or below have been reported in [12,13,14,15,16,17,18,19,20,21,22,23,24]. Most of the ULV DSMs are realized by switched-capacitor (SC) circuits.…”

“…The discrete-time (DT) DSMs in [14,15] employ clock boosting technique to reduce the distortion, but it can cause long-term reliability issues in the advanced process. The 0.4-V DT DSMs in [16,17] employ a mixed differential difference amplifier integrator and a hybrid switching integrator respectively to operate at ULV without a clock boosting circuit. However, the achieved SNDR in [16] is degraded by its complicated switching and noise, and the switch placed in signal input path in [17] can cause distortion during input signal integration phase as its on-resistance still varies with the input signal and the process corner.…”

“…The 0.4-V DT DSMs in [16,17] employ a mixed differential difference amplifier integrator and a hybrid switching integrator respectively to operate at ULV without a clock boosting circuit. However, the achieved SNDR in [16] is degraded by its complicated switching and noise, and the switch placed in signal input path in [17] can cause distortion during input signal integration phase as its on-resistance still varies with the input signal and the process corner. Moreover, the SC circuits require large GBW of amplifiers, which in turn lead to high power consumption.…”