2014 IEEE Computer Society Annual Symposium on VLSI 2014
DOI: 10.1109/isvlsi.2014.32
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A Weighted Sensing Scheme for ReRAM-Based Cross-Point Memory Array

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Cited by 28 publications
(12 citation statements)
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“…Sneak path is one of the major concerns in resistive crossbar array design [19,20]. It refers to the intrinsic leakage flowing through unselected cells, which degrades the programming efficiency and the data detection accuracy.…”
Section: T1r Crossbar Arraymentioning
confidence: 99%
“…Sneak path is one of the major concerns in resistive crossbar array design [19,20]. It refers to the intrinsic leakage flowing through unselected cells, which degrades the programming efficiency and the data detection accuracy.…”
Section: T1r Crossbar Arraymentioning
confidence: 99%
“…With the proposed read scheme and low switching power RRAM cell, the stored state of RRAM cell in a 128 × 128 array can be effectively determined even without the selector. This is the largest size among any array presented in literature for 1 R RRAM 1 2 3 6 , even close to among those with 1S1R devices 1 2 3 . Besides, the 1S1R device has low resistance in the range of KΩ at LRS, which consumes ~3 orders of magnitude more power than this 1 R device in MΩ range.…”
Section: Resultsmentioning
confidence: 54%
“…The sneak current is much more severe as the array size increases and it is data pattern dependent. The worst case for usual crosspoint array is when the read cell is at HRS while all other cells are at LRS or vice versa 1 2 3 4 5 6 .…”
mentioning
confidence: 99%
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“…The selector is a nonlinear device, the resistance of which ranges approximately from 10 3 Ω to 10 13 Ω. When the applied voltage is lower than V th of the integrate capacitor, the selector resistance is more than 10 9 Ω, which is much larger than the memristance range of 10 4 Ω ∼ 10 6 Ω [14]. As a result, the sneak path leakage can be well controlled.…”
Section: Memristor Crossbar Array Structurementioning
confidence: 99%