A Wideband RF Power Amplifier in 45-nm CMOS SOI Technology With Substrate Transferred to AlN

Chen, Jing-Hwa; Helmi, Sultan R.; Pajouhi, H.; Sim, Yukeun; Mohammadi, Saeed

doi:10.1109/tmtt.2012.2223229

Cited by 19 publications

(10 citation statements)

References 14 publications

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“…The total phase differences for feeding from bottom and top can be calculated according to θ total−n = out−n ± θ in−n (23) where θ total−n is the total phase difference, out−n is the overall output phase of the stack [see (19)], and θ in−n is the overall input phase of the stack [see (22)]. The plus sign represents the feeding from the top while the minus sign represents the feeding from the bottom.…”

Section: Feeding Effectmentioning

confidence: 99%

“…Both PAs are designed based on triple Casecode cells with a bottom feed configuration. The first PA is designed for K-band/5G applications (20)(21)(22)(23)(24)(25)(26)(27)(28)(29)(30), while the second PA is targeted at U-band (45-55 GHz) frequencies for ultrahigh-bandwidth communications. The CMOS SOI technology surrounds each transistor with buried and trench oxide, leading to electrically isolated transistors.…”

Section: Pa Circuit Designmentioning

confidence: 99%

“…The triple Cascode configuration provides higher gain, which helps boost the PAE. A network of feedback resistors dynamically biases NMOS transistors in class-AB mode and overcomes the gate-oxide breakdown in the stacked cell PA design [23], [24]. Transistor sizes (each with 320 fingers and an overall width of 320 μm) are optimized to provide optimum output impedance close to 50 in the frequency range from 20 to 30 GHz.…”

Section: Pa Circuit Designmentioning

confidence: 99%

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High-Efficiency Microwave and mm-Wave Stacked Cell CMOS SOI Power Amplifiers

Helmi

Chen

Mohammadi

2016

IEEE Trans. Microwave Theory Techn.

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Design and implementation of high-efficiency microwave and mm-wave CMOS silicon-on-insulator (SOI) power amplifiers (PAs) based on a stacked cell approach is presented. Two stacked cell PAs have been implemented in GlobalFoundries 45-nm CMOS SOI technology. The first PA operating at K-band (24-28 GHz) is designed with three stacked triple Cascode cells. Each cell uses three standard transistors with separate layout. At 24 GHz, the K-band PA biased under a supply voltage of 10.8 V measures a maximum linear power gain of 13 dB, a saturated output power P SAT of 25.3 dBm, a −1-dB output power P 1dB of 23.8 dBm, and a peak poweradded efficiency (PAE) of 20%. The second PA targeted at U-band frequencies is designed with two stacked triple Cascode cells. Transistors in each cell have a combined layout that reduces parasitic capacitances, leading to significant improvement in the PAE at mm-wave frequencies. The U-band PA operates from 42 to 54 GHz. At 46 GHz, and under a supply voltage of 6 V, it measures a saturated output power ( P SAT ) of 22.4 dBm, a linear gain of 17.4 dB, and an unprecedented peak PAE of 42%.Index Terms-CMOS, fifth-generation (5G), high efficiency, microwave frequency, millimeter-wave (mm-wave) frequency, power amplifier (PA), silicon-on-insulator (SOI), stacked transistors.

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Section: Feeding Effectmentioning

confidence: 99%

Section: Pa Circuit Designmentioning

confidence: 99%

Section: Pa Circuit Designmentioning

confidence: 99%

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High-Efficiency Microwave and mm-Wave Stacked Cell CMOS SOI Power Amplifiers

Helmi

Chen

Mohammadi

2016

IEEE Trans. Microwave Theory Techn.

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“…Therefore, those transistors are the ones that require attention (the possibility of breakdown if signal swing increases) because they have to withstand more voltage swings compared to the bottom transistors [45]. The overall voltage swing ( ) Vtotal can be expressed by the following equation for n stacked transistors [46]:…”

Section: The Effect Of Parasitic Capacitance On Stacked-transistor Pasmentioning

confidence: 99%

Stacking the Deck for Efficiency: RF- to Millimeter-Wave Stacked CMOS SOI Power Amplifiers

et al. 2016

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T he emerging demand for high-capacity wireless mobile communication and the advent of the Internet of Things and fifthgeneration communication standards have motivated the development of high-performance transceivers. The power amplifier (PA) is the most critical part in the transmit path and dominates the transceiver's performance, including coverage range, data rate, spectrum compliance, and dc power dissipation. Integration capability and the relatively low cost of complementary-metal-oxide-semiconductor (CMOS) technology, on the other hand, have propelled it into the wireless market. CMOS technology enables complete system-on-chip solutions, resulting in ), Yingheng Tang (tang96@purdue.edu), and Saeed Mohammadi (saeedm@purdue.edu) are with the Birck Nanotechnology Center, Purdue University West Lafayette, Indiana, United States.im ag e lic en se d by in gr am pu bl is hi ng

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“…1,6,7 Such paths can limit the IC frequency response and power delivered to the load, giving rise to overloading conditions and eventually, the IC failure. 8 To identify them, an innovative and efficient solution is its local tracking through the IC under operation. In this regard, using off-chip thermal imaging systems (e.g., Infrared…”

mentioning

confidence: 99%

Thermal phase lag heterodyne infrared imaging for current tracking in radio frequency integrated circuits

Perpiñà

León

Altet

et al. 2017

Applied Physics Letters

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With thermal phase lag measurements, current paths are tracked in a Class A Radio Frequency (RF) power amplifier at 2 GHz. The amplifier is heterodynally driven at 440MHz and 2 GHz, and its resulting thermal field respectively inspected at 1013 and 113Hz with an infrared lock-in thermography system. The phase lag maps evidence with a higher sensitivity than thermal amplitude measurements, an input-output loop due to a substrate capacitive coupling. This limits the amplifier's performance, raising the power consumption in certain components. Other information relative to local power consumption and amplifier operation is also inferred. This approach allows the local non-invasive testing of integrated systems regardless of their operating frequency.

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A Wideband RF Power Amplifier in 45-nm CMOS SOI Technology With Substrate Transferred to AlN

Cited by 19 publications

References 14 publications

High-Efficiency Microwave and mm-Wave Stacked Cell CMOS SOI Power Amplifiers

High-Efficiency Microwave and mm-Wave Stacked Cell CMOS SOI Power Amplifiers

Stacking the Deck for Efficiency: RF- to Millimeter-Wave Stacked CMOS SOI Power Amplifiers

Thermal phase lag heterodyne infrared imaging for current tracking in radio frequency integrated circuits

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